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authorJuergen Ributzka <juergen@apple.com>2014-04-12 02:53:51 +0000
committerJuergen Ributzka <juergen@apple.com>2014-04-12 02:53:51 +0000
commitcf03068d91f70cb0a0aeff2409ac67fe781f6390 (patch)
treef7aebcc58be274bb224b8228bf6e3c980afa3142
parent6e17aa45a392fa998fe9316267dfd9eb82eeea99 (diff)
downloadbcm5719-llvm-cf03068d91f70cb0a0aeff2409ac67fe781f6390.tar.gz
bcm5719-llvm-cf03068d91f70cb0a0aeff2409ac67fe781f6390.zip
[ARM64] Never hoist the shift value of a shift instruction.
There is no need to check if we want to hoist the immediate value of an shift instruction. Simply return TCC_Free right away. llvm-svn: 206101
-rw-r--r--llvm/lib/Target/ARM64/ARM64TargetTransformInfo.cpp10
-rw-r--r--llvm/test/Transforms/ConstantHoisting/ARM64/large-immediate.ll9
2 files changed, 16 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64TargetTransformInfo.cpp b/llvm/lib/Target/ARM64/ARM64TargetTransformInfo.cpp
index cc8cc806ec7..372900e99fe 100644
--- a/llvm/lib/Target/ARM64/ARM64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/ARM64/ARM64TargetTransformInfo.cpp
@@ -203,15 +203,19 @@ unsigned ARM64TTI::getIntImmCost(unsigned Opcode, unsigned Idx,
case Instruction::SDiv:
case Instruction::URem:
case Instruction::SRem:
- case Instruction::Shl:
- case Instruction::LShr:
- case Instruction::AShr:
case Instruction::And:
case Instruction::Or:
case Instruction::Xor:
case Instruction::ICmp:
ImmIdx = 1;
break;
+ // Always return TCC_Free for the shift value of a shift instruction.
+ case Instruction::Shl:
+ case Instruction::LShr:
+ case Instruction::AShr:
+ if (Idx == 1)
+ return TCC_Free;
+ break;
case Instruction::Trunc:
case Instruction::ZExt:
case Instruction::SExt:
diff --git a/llvm/test/Transforms/ConstantHoisting/ARM64/large-immediate.ll b/llvm/test/Transforms/ConstantHoisting/ARM64/large-immediate.ll
index 92ad6ee70de..575be791d9b 100644
--- a/llvm/test/Transforms/ConstantHoisting/ARM64/large-immediate.ll
+++ b/llvm/test/Transforms/ConstantHoisting/ARM64/large-immediate.ll
@@ -16,3 +16,12 @@ define i512 @test2(i512 %a) nounwind {
%2 = or i512 %1, 7
ret i512 %2
}
+
+; Check that we don't hoist the shift value of a shift instruction.
+define i512 @test3(i512 %a) nounwind {
+; CHECK-LABEL: test3
+; CHECK-NOT: %const = bitcast i512 504 to i512
+ %1 = shl i512 %a, 504
+ %2 = ashr i512 %1, 504
+ ret i512 %2
+}
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