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| author | Craig Topper <craig.topper@intel.com> | 2018-06-11 19:20:15 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-06-11 19:20:15 +0000 |
| commit | ceed99baf0fac07d5abb080f88f110be3974a312 (patch) | |
| tree | b780bcb9e7597823a750ee94bc51c1ef204ced50 | |
| parent | 4da41c13a5ed8dcec3fa945211e5da0286ecbe9e (diff) | |
| download | bcm5719-llvm-ceed99baf0fac07d5abb080f88f110be3974a312.tar.gz bcm5719-llvm-ceed99baf0fac07d5abb080f88f110be3974a312.zip | |
[X86] Reorder some type constraints to force things to be vectors and integer/fp before forcing them to be the same size.
This may be needed by another patch that I'm working on. It should have no effect on any of the generated outputs.
llvm-svn: 334430
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td index 5a8ca994235..ee72a7231e3 100644 --- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td +++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td @@ -226,9 +226,9 @@ def X86vpcomu : SDNode<"X86ISD::VPCOMU", def X86vpermil2 : SDNode<"X86ISD::VPERMIL2", SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCisSameAs<0,1>, SDTCisSameAs<0,2>, - SDTCisSameSizeAs<0,3>, - SDTCisSameNumEltsAs<0, 3>, SDTCisFP<0>, SDTCisInt<3>, + SDTCisSameNumEltsAs<0, 3>, + SDTCisSameSizeAs<0,3>, SDTCisVT<4, i8>]>>; def X86vpperm : SDNode<"X86ISD::VPPERM", SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>, @@ -284,9 +284,9 @@ def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>, SDTCisSameAs<0,2>]>; def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>, - SDTCisSameSizeAs<0,2>, + SDTCisFP<0>, SDTCisInt<2>, SDTCisSameNumEltsAs<0,2>, - SDTCisFP<0>, SDTCisInt<2>]>; + SDTCisSameSizeAs<0,2>]>; def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>, SDTCisVT<2, i8>]>; def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>, |
