[InstCombine] auto-generate checks; NFC

llvm-svn: 328329

2 files changed, 48 insertions, 16 deletions

diff --git a/llvm/test/Transforms/InstCombine/vector_gep1.ll b/llvm/test/Transforms/InstCombine/vector_gep1.ll
index 0f4e407dd7f..8e5bcf963ea 100644
--- a/llvm/test/Transforms/InstCombine/vector_gep1.ll
+++ b/llvm/test/Transforms/InstCombine/vector_gep1.ll
@@ -1,34 +1,51 @@
-; RUN: opt -instcombine -disable-output < %s
-; RUN: opt -instsimplify -disable-output < %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 @G1 = global i8 zeroinitializer
 
 define <2 x i1> @test(<2 x i8*> %a, <2 x i8*> %b) {
-   %A = icmp eq <2 x i8*> %a, %b
-   ret <2 x i1> %A
+; CHECK-LABEL: @test(
+; CHECK-NEXT:    [[C:%.*]] = icmp eq <2 x i8*> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret <2 x i1> [[C]]
+;
+  %c = icmp eq <2 x i8*> %a, %b
+  ret <2 x i1> %c
 }
 
 define <2 x i1> @test2(<2 x i8*> %a) {
-  %A = inttoptr <2 x i32> <i32 1, i32 2> to <2 x i8*>
-  %B = icmp ult <2 x i8*> %A, zeroinitializer
-  ret <2 x i1> %B
+; CHECK-LABEL: @test2(
+; CHECK-NEXT:    ret <2 x i1> zeroinitializer
+;
+  %c = inttoptr <2 x i32> <i32 1, i32 2> to <2 x i8*>
+  %d = icmp ult <2 x i8*> %c, zeroinitializer
+  ret <2 x i1> %d
 }
 
 define <2 x i1> @test3(<2 x i8*> %a) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:    ret <2 x i1> zeroinitializer
+;
   %g = getelementptr i8, <2 x i8*> %a, <2 x i32> <i32 1, i32 0>
   %B = icmp ult <2 x i8*> %g, zeroinitializer
   ret <2 x i1> %B
 }
 
 define <1 x i1> @test4(<1 x i8*> %a) {
+; CHECK-LABEL: @test4(
+; CHECK-NEXT:    ret <1 x i1> zeroinitializer
+;
   %g = getelementptr i8, <1 x i8*> %a, <1 x i32> <i32 1>
   %B = icmp ult <1 x i8*> %g, zeroinitializer
   ret <1 x i1> %B
 }
 
 define <2 x i1> @test5(<2 x i8*> %a) {
+; CHECK-LABEL: @test5(
+; CHECK-NEXT:    ret <2 x i1> zeroinitializer
+;
   %w = getelementptr i8, <2 x i8*> %a, <2 x i32> zeroinitializer
   %e = getelementptr i8, <2 x i8*> %w, <2 x i32> <i32 5, i32 9>
   %g = getelementptr i8, <2 x i8*> %e, <2 x i32> <i32 1, i32 0>
@@ -37,6 +54,11 @@ define <2 x i1> @test5(<2 x i8*> %a) {
 }
 
 define <2 x i32*> @test7(<2 x {i32, i32}*> %a) {
+; CHECK-LABEL: @test7(
+; CHECK-NEXT:    [[W:%.*]] = getelementptr { i32, i32 }, <2 x { i32, i32 }*> [[A:%.*]], <2 x i64> <i64 5, i64 9>, <2 x i32> zeroinitializer
+; CHECK-NEXT:    ret <2 x i32*> [[W]]
+;
   %w = getelementptr {i32, i32}, <2 x {i32, i32}*> %a, <2 x i32> <i32 5, i32 9>, <2 x i32> zeroinitializer
   ret <2 x i32*> %w
 }
+
diff --git a/llvm/test/Transforms/InstCombine/vector_gep2.ll b/llvm/test/Transforms/InstCombine/vector_gep2.ll
index 1b80ffd101c..dcbcf0c4000 100644
--- a/llvm/test/Transforms/InstCombine/vector_gep2.ll
+++ b/llvm/test/Transforms/InstCombine/vector_gep2.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
@@ -5,30 +6,39 @@ target triple = "x86_64-unknown-linux-gnu"
 
 define <2 x i8*> @testa(<2 x i8*> %a) {
 ; CHECK-LABEL: @testa(
+; CHECK-NEXT:    [[G:%.*]] = getelementptr i8, <2 x i8*> [[A:%.*]], <2 x i64> <i64 0, i64 1>
+; CHECK-NEXT:    ret <2 x i8*> [[G]]
+;
   %g = getelementptr i8, <2 x i8*> %a, <2 x i32> <i32 0, i32 1>
-; CHECK: getelementptr i8, <2 x i8*> %a, <2 x i64> <i64 0, i64 1>
   ret <2 x i8*> %g
 }
 
 define <8 x double*> @vgep_s_v8i64(double* %a, <8 x i64>%i) {
-; CHECK-LABEL: @vgep_s_v8i64
-; CHECK: getelementptr double, double* %a, <8 x i64> %i
+; CHECK-LABEL: @vgep_s_v8i64(
+; CHECK-NEXT:    [[VECTORGEP:%.*]] = getelementptr double, double* [[A:%.*]], <8 x i64> [[I:%.*]]
+; CHECK-NEXT:    ret <8 x double*> [[VECTORGEP]]
+;
   %VectorGep = getelementptr double, double* %a, <8 x i64> %i
   ret <8 x double*> %VectorGep
 }
 
 define <8 x double*> @vgep_s_v8i32(double* %a, <8 x i32>%i) {
-; CHECK-LABEL: @vgep_s_v8i32
-; CHECK: %1 = sext <8 x i32> %i to <8 x i64>
-; CHECK: getelementptr double, double* %a, <8 x i64> %1
+; CHECK-LABEL: @vgep_s_v8i32(
+; CHECK-NEXT:    [[TMP1:%.*]] = sext <8 x i32> [[I:%.*]] to <8 x i64>
+; CHECK-NEXT:    [[VECTORGEP:%.*]] = getelementptr double, double* [[A:%.*]], <8 x i64> [[TMP1]]
+; CHECK-NEXT:    ret <8 x double*> [[VECTORGEP]]
+;
   %VectorGep = getelementptr double, double* %a, <8 x i32> %i
   ret <8 x double*> %VectorGep
 }
 
 define <8 x i8*> @vgep_v8iPtr_i32(<8 x i8*> %a, i32 %i) {
-; CHECK-LABEL: @vgep_v8iPtr_i32
-; CHECK:  %1 = sext i32 %i to i64
-; CHECK:  %VectorGep = getelementptr i8, <8 x i8*> %a, i64 %1
+; CHECK-LABEL: @vgep_v8iPtr_i32(
+; CHECK-NEXT:    [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64
+; CHECK-NEXT:    [[VECTORGEP:%.*]] = getelementptr i8, <8 x i8*> [[A:%.*]], i64 [[TMP1]]
+; CHECK-NEXT:    ret <8 x i8*> [[VECTORGEP]]
+;
   %VectorGep = getelementptr i8, <8 x i8*> %a, i32 %i
   ret <8 x i8*> %VectorGep
 }
+