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author | Bill Wendling <isanbard@gmail.com> | 2008-08-20 20:32:05 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2008-08-20 20:32:05 +0000 |
commit | cd01e898526e457548c6f9796fc38dc03eb9a525 (patch) | |
tree | 70477558158513056facd439ec8f4a9be1736abe | |
parent | 07a34a5f69c8f8e2ff6fb1cf198841db9d505cd3 (diff) | |
download | bcm5719-llvm-cd01e898526e457548c6f9796fc38dc03eb9a525.tar.gz bcm5719-llvm-cd01e898526e457548c6f9796fc38dc03eb9a525.zip |
Don't hoist instructions that define a physical register.
llvm-svn: 55074
-rw-r--r-- | llvm/lib/CodeGen/MachineLICM.cpp | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp index 302581f4dd5..1ec32b53365 100644 --- a/llvm/lib/CodeGen/MachineLICM.cpp +++ b/llvm/lib/CodeGen/MachineLICM.cpp @@ -273,7 +273,14 @@ bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { const MachineOperand &MO = I.getOperand(i); - if (!MO.isRegister() || !MO.isUse()) + if (!MO.isRegister()) + continue; + + if (MO.isDef() && TargetRegisterInfo::isPhysicalRegister(MO.getReg())) + // Don't hoist an instruction that defines a physical register. + return false; + + if (!MO.isUse()) continue; unsigned Reg = MO.getReg(); |