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authorOwen Anderson <resistor@mac.com>2011-11-16 01:02:57 +0000
committerOwen Anderson <resistor@mac.com>2011-11-16 01:02:57 +0000
commitca2f78a95be675a98107292bee4a7578ab90f2a4 (patch)
treef9c6ecf015ed0f3bbb0d703af8325511dcdc68e3
parent90c7a108ca6872cf025d4b6485c788d78c2a8504 (diff)
downloadbcm5719-llvm-ca2f78a95be675a98107292bee4a7578ab90f2a4.tar.gz
bcm5719-llvm-ca2f78a95be675a98107292bee4a7578ab90f2a4.zip
Rename MVT::untyped to MVT::Untyped to match similar nomenclature.
llvm-svn: 144747
-rw-r--r--llvm/include/llvm/CodeGen/ValueTypes.h2
-rw-r--r--llvm/lib/CodeGen/MachineLICM.cpp2
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp4
-rw-r--r--llvm/lib/VMCore/ValueTypes.cpp2
-rw-r--r--llvm/utils/TableGen/CodeGenTarget.cpp2
5 files changed, 6 insertions, 6 deletions
diff --git a/llvm/include/llvm/CodeGen/ValueTypes.h b/llvm/include/llvm/CodeGen/ValueTypes.h
index cae0bcb165c..7a7080f28fa 100644
--- a/llvm/include/llvm/CodeGen/ValueTypes.h
+++ b/llvm/include/llvm/CodeGen/ValueTypes.h
@@ -83,7 +83,7 @@ namespace llvm {
isVoid = 35, // This has no value
- untyped = 36, // This value takes a register, but has
+ Untyped = 36, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index e756dedff47..e5e8c5117ba 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -670,7 +670,7 @@ MachineLICM::getRegisterClassIDAndCost(const MachineInstr *MI,
unsigned &RCId, unsigned &RCCost) const {
const TargetRegisterClass *RC = MRI->getRegClass(Reg);
EVT VT = *RC->vt_begin();
- if (VT == MVT::untyped) {
+ if (VT == MVT::Untyped) {
RCId = RC->getID();
RCCost = 1;
} else {
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index 5adbc0d6aa7..cd0da37f67f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -267,7 +267,7 @@ private:
/// GetCostForDef - Looks up the register class and cost for a given definition.
/// Typically this just means looking up the representative register class,
-/// but for untyped values (MVT::untyped) it means inspecting the node's
+/// but for untyped values (MVT::Untyped) it means inspecting the node's
/// opcode to determine what register class is being generated.
static void GetCostForDef(const ScheduleDAGSDNodes::RegDefIter &RegDefPos,
const TargetLowering *TLI,
@@ -278,7 +278,7 @@ static void GetCostForDef(const ScheduleDAGSDNodes::RegDefIter &RegDefPos,
// Special handling for untyped values. These values can only come from
// the expansion of custom DAG-to-DAG patterns.
- if (VT == MVT::untyped) {
+ if (VT == MVT::Untyped) {
const SDNode *Node = RegDefPos.GetNode();
unsigned Opcode = Node->getMachineOpcode();
diff --git a/llvm/lib/VMCore/ValueTypes.cpp b/llvm/lib/VMCore/ValueTypes.cpp
index e13bd7df737..089c2594cbe 100644
--- a/llvm/lib/VMCore/ValueTypes.cpp
+++ b/llvm/lib/VMCore/ValueTypes.cpp
@@ -139,7 +139,7 @@ std::string EVT::getEVTString() const {
case MVT::v2f64: return "v2f64";
case MVT::v4f64: return "v4f64";
case MVT::Metadata:return "Metadata";
- case MVT::untyped: return "untyped";
+ case MVT::Untyped: return "Untyped";
}
}
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp
index 4a7bad7e6d8..6e1872e27d9 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -90,7 +90,7 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) {
case MVT::Metadata: return "MVT::Metadata";
case MVT::iPTR: return "MVT::iPTR";
case MVT::iPTRAny: return "MVT::iPTRAny";
- case MVT::untyped: return "MVT::untyped";
+ case MVT::Untyped: return "MVT::Untyped";
default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
}
}
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