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author | Changpeng Fang <changpeng.fang@gmail.com> | 2015-12-18 20:04:28 +0000 |
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committer | Changpeng Fang <changpeng.fang@gmail.com> | 2015-12-18 20:04:28 +0000 |
commit | c9963936e70b39b3015687e376c431f58dc3b244 (patch) | |
tree | 918a9be183d4f53139dadd5f2c2a71abd4979fc1 | |
parent | ef735b74c1d888834f81d9d23933696f12d83fa8 (diff) | |
download | bcm5719-llvm-c9963936e70b39b3015687e376c431f58dc3b244.tar.gz bcm5719-llvm-c9963936e70b39b3015687e376c431f58dc3b244.zip |
AMDGPU/SI: Test commit
Summary: This is just my first commit. Test!
Reviewers: none
Subscribers: none
Differential Revision: none
llvm-svn: 256022
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 2375432305a..6c4cb011ef2 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -1433,7 +1433,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI, return false; } - // Make sure the register classes are correct + // Make sure the register classes are correct. for (int i = 0, e = Desc.getNumOperands(); i != e; ++i) { if (MI->getOperand(i).isFPImm()) { ErrInfo = "FPImm Machine Operands are not supported. ISel should bitcast " |