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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-12-10 18:39:47 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-12-10 18:39:47 +0000 |
commit | c6e9380a56a6c7132b776412b81b1870b3d546ca (patch) | |
tree | c0ccb262bc4908375e8cca6f7e30687efc49bc86 | |
parent | 2ead087b6dc798da8cfa30cb116c8cda892a2b6a (diff) | |
download | bcm5719-llvm-c6e9380a56a6c7132b776412b81b1870b3d546ca.tar.gz bcm5719-llvm-c6e9380a56a6c7132b776412b81b1870b3d546ca.zip |
[Hexagon] Check if operand is an immediate before getImm
llvm-svn: 348787
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp | 27 | ||||
-rw-r--r-- | llvm/test/CodeGen/Hexagon/addrmode-immop.mir | 40 |
2 files changed, 55 insertions, 12 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp index 29c044b3b72..126d67c32ab 100644 --- a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp +++ b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp @@ -502,7 +502,8 @@ bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, MIB.add(ImmOp); OpStart = 4; Changed = true; - } else if (HII->getAddrMode(*OldMI) == HexagonII::BaseImmOffset) { + } else if (HII->getAddrMode(*OldMI) == HexagonII::BaseImmOffset && + OldMI->getOperand(2).isImm()) { short NewOpCode = HII->changeAddrMode_io_abs(*OldMI); assert(NewOpCode >= 0 && "Invalid New opcode\n"); MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)) @@ -518,17 +519,19 @@ bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); LLVM_DEBUG(dbgs() << "[TO]: " << *MIB << "\n"); - } else if (ImmOpNum == 2 && OldMI->getOperand(3).getImm() == 0) { - short NewOpCode = HII->changeAddrMode_rr_io(*OldMI); - assert(NewOpCode >= 0 && "Invalid New opcode\n"); - MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); - MIB.add(OldMI->getOperand(0)); - MIB.add(OldMI->getOperand(1)); - MIB.add(ImmOp); - OpStart = 4; - Changed = true; - LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); - LLVM_DEBUG(dbgs() << "[TO]: " << *MIB << "\n"); + } else if (ImmOpNum == 2) { + if (OldMI->getOperand(3).isImm() && OldMI->getOperand(3).getImm() == 0) { + short NewOpCode = HII->changeAddrMode_rr_io(*OldMI); + assert(NewOpCode >= 0 && "Invalid New opcode\n"); + MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); + MIB.add(OldMI->getOperand(0)); + MIB.add(OldMI->getOperand(1)); + MIB.add(ImmOp); + OpStart = 4; + Changed = true; + LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); + LLVM_DEBUG(dbgs() << "[TO]: " << *MIB << "\n"); + } } if (Changed) diff --git a/llvm/test/CodeGen/Hexagon/addrmode-immop.mir b/llvm/test/CodeGen/Hexagon/addrmode-immop.mir new file mode 100644 index 00000000000..99c486aa5a4 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/addrmode-immop.mir @@ -0,0 +1,40 @@ +# RUN: llc -march=hexagon -run-pass amode-opt %s -o - | FileCheck %s +# REQUIRES: asserts + +# Check that this doesn't crash. +# CHECK: $r2 = L2_loadri_io killed $r2, @f1 - 1 + +--- | + target triple = "hexagon-unknown-unknown-elf" + + %s.0 = type { i32 (...)**, i32, i32, %s.1 } + %s.1 = type { i32, i32 } + + @g0 = external dso_local unnamed_addr constant { [3 x i8*], [3 x i8*] }, align 4 + + ; Function Attrs: norecurse + define void @f0() #0 { + b0: + %v0 = load i32 (%s.0*)*, i32 (%s.0*)** bitcast (i8* getelementptr (i8, i8* bitcast (i8** getelementptr inbounds ({ [3 x i8*], [3 x i8*] }, { [3 x i8*], [3 x i8*] }* @g0, i32 0, inrange i32 0, i32 3) to i8*), i32 sub (i32 ptrtoint (i32 (%s.0*)* @f1 to i32), i32 1)) to i32 (%s.0*)**), align 4 + %v1 = call i32 %v0(%s.0* nonnull undef) + unreachable + } + + ; Function Attrs: norecurse nounwind + declare dso_local i32 @f1(%s.0*) #1 align 2 + + attributes #0 = { norecurse "target-cpu"="hexagonv60" } + attributes #1 = { norecurse nounwind "target-cpu"="hexagonv60" } +... + +--- +name: f0 +tracksRegLiveness: true +body: | + bb.0.b0: + $r2 = A2_tfrsi @g0 + 12 + $r2 = L2_loadri_io killed $r2, @f1 - 1 :: (load 4 from `i32 (%s.0*)** bitcast (i8* getelementptr (i8, i8* bitcast (i8** getelementptr inbounds ({ [3 x i8*], [3 x i8*] }, { [3 x i8*], [3 x i8*] }* @g0, i32 0, inrange i32 0, i32 3) to i8*), i32 sub (i32 ptrtoint (i32 (%s.0*)* @f1 to i32), i32 1)) to i32 (%s.0*)**)`) + ADJCALLSTACKDOWN 0, 0, implicit-def $r29, implicit-def dead $r30, implicit $r31, implicit $r30, implicit $r29 + PS_callr_nr killed $r2, hexagoncsr, implicit undef $r0, implicit-def $r29, implicit-def dead $r0 + ADJCALLSTACKUP 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit-def dead $r31, implicit $r29 +... |