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| author | Sanjay Patel <spatel@rotateright.com> | 2019-01-30 21:58:20 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2019-01-30 21:58:20 +0000 |
| commit | c6d261efdb184cddf4380d8c450d09936afdecf4 (patch) | |
| tree | c95e09d1605e472b3c4aa99236e88643a48e3409 | |
| parent | 1849dd4accb7ab87104c257da41e2638cf7fe71b (diff) | |
| download | bcm5719-llvm-c6d261efdb184cddf4380d8c450d09936afdecf4.tar.gz bcm5719-llvm-c6d261efdb184cddf4380d8c450d09936afdecf4.zip | |
[AArch64][x86] add tests for add/sub signbits fold; NFC
As discussed/shown in D57401, we are missing a fold for
subtract of 0/1 --> add 0/-1.
llvm-svn: 352678
| -rw-r--r-- | llvm/test/CodeGen/AArch64/bool-ext-inc.ll | 31 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/bool-ext-inc.ll | 34 |
2 files changed, 65 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/bool-ext-inc.ll b/llvm/test/CodeGen/AArch64/bool-ext-inc.ll index 7fc451e4d75..2b702f9644a 100644 --- a/llvm/test/CodeGen/AArch64/bool-ext-inc.ll +++ b/llvm/test/CodeGen/AArch64/bool-ext-inc.ll @@ -27,3 +27,34 @@ define <4 x i32> @zextbool_sub_vector(<4 x i32> %c1, <4 x i32> %c2, <4 x i32> %x ret <4 x i32> %s } +define i32 @assertsext_sub_1(i1 signext %cond, i32 %y) { +; CHECK-LABEL: assertsext_sub_1: +; CHECK: // %bb.0: +; CHECK-NEXT: and w8, w0, #0x1 +; CHECK-NEXT: sub w0, w1, w8 +; CHECK-NEXT: ret + %e = zext i1 %cond to i32 + %r = sub i32 %y, %e + ret i32 %r +} + +define i32 @assertsext_add_1(i1 signext %cond, i32 %y) { +; CHECK-LABEL: assertsext_add_1: +; CHECK: // %bb.0: +; CHECK-NEXT: sub w0, w1, w0 +; CHECK-NEXT: ret + %e = zext i1 %cond to i32 + %r = add i32 %e, %y + ret i32 %r +} + +define i32 @assertsext_add_1_commute(i1 signext %cond, i32 %y) { +; CHECK-LABEL: assertsext_add_1_commute: +; CHECK: // %bb.0: +; CHECK-NEXT: sub w0, w1, w0 +; CHECK-NEXT: ret + %e = zext i1 %cond to i32 + %r = add i32 %y, %e + ret i32 %r +} + diff --git a/llvm/test/CodeGen/X86/bool-ext-inc.ll b/llvm/test/CodeGen/X86/bool-ext-inc.ll index 4c81d05ee1f..cfd6dc8c62c 100644 --- a/llvm/test/CodeGen/X86/bool-ext-inc.ll +++ b/llvm/test/CodeGen/X86/bool-ext-inc.ll @@ -127,3 +127,37 @@ define <4 x i32> @zextbool_sub_vector(<4 x i32> %cmp1, <4 x i32> %cmp2, <4 x i32 ret <4 x i32> %s } +define i32 @assertsext_sub_1(i1 signext %cond, i32 %y) { +; CHECK-LABEL: assertsext_sub_1: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %esi, %eax +; CHECK-NEXT: andl $1, %edi +; CHECK-NEXT: subl %edi, %eax +; CHECK-NEXT: retq + %e = zext i1 %cond to i32 + %r = sub i32 %y, %e + ret i32 %r +} + +define i32 @assertsext_add_1(i1 signext %cond, i32 %y) { +; CHECK-LABEL: assertsext_add_1: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %esi, %eax +; CHECK-NEXT: subl %edi, %eax +; CHECK-NEXT: retq + %e = zext i1 %cond to i32 + %r = add i32 %e, %y + ret i32 %r +} + +define i32 @assertsext_add_1_commute(i1 signext %cond, i32 %y) { +; CHECK-LABEL: assertsext_add_1_commute: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %esi, %eax +; CHECK-NEXT: subl %edi, %eax +; CHECK-NEXT: retq + %e = zext i1 %cond to i32 + %r = add i32 %y, %e + ret i32 %r +} + |
