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author | Sanjay Patel <spatel@rotateright.com> | 2016-06-27 17:25:57 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2016-06-27 17:25:57 +0000 |
commit | c6ada53be5ba03b8cb764abb4a7a0777ddcf60ad (patch) | |
tree | e86b1d42b2b0db0b28ed6d40026f008e9d7c74fd | |
parent | b0f59cb5a8ad1037dd5e1c202d745a6c162f647a (diff) | |
download | bcm5719-llvm-c6ada53be5ba03b8cb764abb4a7a0777ddcf60ad.tar.gz bcm5719-llvm-c6ada53be5ba03b8cb764abb4a7a0777ddcf60ad.zip |
[InstCombine] use m_APInt for div --> ashr fold
The APInt matcher works with splat vectors, so we get this fold for vectors too.
llvm-svn: 273897
-rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp | 14 | ||||
-rw-r--r-- | llvm/test/Transforms/InstCombine/exact.ll | 9 |
2 files changed, 15 insertions, 8 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp index 5fb337db165..d7bd80261ab 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp @@ -1143,14 +1143,12 @@ Instruction *InstCombiner::visitSDiv(BinaryOperator &I) { if (match(Op1, m_AllOnes())) return BinaryOperator::CreateNeg(Op0); - if (ConstantInt *RHS = dyn_cast<ConstantInt>(Op1)) { - // sdiv X, C --> ashr exact X, log2(C) - if (I.isExact() && RHS->getValue().isNonNegative() && - RHS->getValue().isPowerOf2()) { - Value *ShAmt = llvm::ConstantInt::get(RHS->getType(), - RHS->getValue().exactLogBase2()); - return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName()); - } + // sdiv exact X, C --> ashr exact X, log2(C) + const APInt *Op1C; + if (match(Op1, m_APInt(Op1C)) && I.isExact() && Op1C->isNonNegative() && + Op1C->isPowerOf2()) { + Value *ShAmt = ConstantInt::get(Op1->getType(), Op1C->exactLogBase2()); + return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName()); } if (Constant *RHS = dyn_cast<Constant>(Op1)) { diff --git a/llvm/test/Transforms/InstCombine/exact.ll b/llvm/test/Transforms/InstCombine/exact.ll index 73b1e044a15..9edcd2491ff 100644 --- a/llvm/test/Transforms/InstCombine/exact.ll +++ b/llvm/test/Transforms/InstCombine/exact.ll @@ -19,6 +19,15 @@ define i32 @sdiv2(i32 %x) { ret i32 %y } +define <2 x i32> @sdiv2_vec(<2 x i32> %x) { +; CHECK-LABEL: @sdiv2_vec( +; CHECK-NEXT: [[Y:%.*]] = ashr exact <2 x i32> %x, <i32 7, i32 7> +; CHECK-NEXT: ret <2 x i32> [[Y]] +; + %y = sdiv exact <2 x i32> %x, <i32 128, i32 128> + ret <2 x i32> %y +} + define i32 @sdiv3(i32 %x) { ; CHECK-LABEL: @sdiv3( ; CHECK-NEXT: [[Y:%.*]] = srem i32 %x, 3 |