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| author | Dan Gohman <gohman@apple.com> | 2009-04-13 15:13:28 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-04-13 15:13:28 +0000 |
| commit | c5c2fc45aeefe96ef6326064163d197ad18a232d (patch) | |
| tree | eb8ebeb9b6943e110268062457881a55803eff80 | |
| parent | 04b482227a65e2f7949cd5cd1939e1418fbe985a (diff) | |
| download | bcm5719-llvm-c5c2fc45aeefe96ef6326064163d197ad18a232d.tar.gz bcm5719-llvm-c5c2fc45aeefe96ef6326064163d197ad18a232d.zip | |
Add a comment about MOVSX64rr8.
llvm-svn: 68950
| -rw-r--r-- | llvm/lib/Target/X86/X86Instr64bit.td | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86Instr64bit.td b/llvm/lib/Target/X86/X86Instr64bit.td index c37a93377ed..10e66e88bee 100644 --- a/llvm/lib/Target/X86/X86Instr64bit.td +++ b/llvm/lib/Target/X86/X86Instr64bit.td @@ -255,6 +255,10 @@ def MOV64mi32 : RIi32<0xC7, MRM0m, (outs), (ins i64mem:$dst, i64i32imm:$src), // Sign/Zero extenders +// MOVSX64rr8 always has a REX prefix and it has an 8-bit register +// operand, which makes it a rare instruction with an 8-bit register +// operand that can never access an h register. If support for h registers +// were generalized, this would require a special register class. def MOVSX64rr8 : RI<0xBE, MRMSrcReg, (outs GR64:$dst), (ins GR8 :$src), "movs{bq|x}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (sext GR8:$src))]>, TB; |
