diff options
| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-04-23 17:59:26 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-04-23 17:59:26 +0000 |
| commit | c464dddccbd8b7cf4fc6cf51126ab559cd34749e (patch) | |
| tree | 909f277823ab7977a7f6766e2aaeaae2519d3160 | |
| parent | db41fe166a539b9de670c577f553c8a729282e4e (diff) | |
| download | bcm5719-llvm-c464dddccbd8b7cf4fc6cf51126ab559cd34749e.tar.gz bcm5719-llvm-c464dddccbd8b7cf4fc6cf51126ab559cd34749e.zip | |
[AMDGPU] Fixed addReg() in SIOptimizeExecMaskingPreRA.cpp
The second argument is flags, not subreg.
Differential Revision: https://reviews.llvm.org/D61031
llvm-svn: 359017
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir | 22 |
2 files changed, 23 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp b/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp index c8a146741ec..6340615244c 100644 --- a/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp +++ b/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp @@ -246,7 +246,7 @@ static unsigned optimizeVcndVcmpPair(MachineBasicBlock &MBB, MachineInstr *Andn2 = BuildMI(MBB, *And, And->getDebugLoc(), TII->get(Andn2Opc), And->getOperand(0).getReg()) .addReg(ExecReg) - .addReg(CCReg, CC->getSubReg()); + .addReg(CCReg, 0, CC->getSubReg()); And->eraseFromParent(); LIS->InsertMachineInstrInMaps(*Andn2); diff --git a/llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir b/llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir index a9b8d94b59e..4986f5153b6 100644 --- a/llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir +++ b/llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir @@ -463,3 +463,25 @@ body: | bb.4: S_ENDPGM 0 ... + +# GCN: name: negated_cond_subreg +# GCN: %0.sub0_sub1:sreg_128 = IMPLICIT_DEF +# GCN-NEXT: $vcc = S_ANDN2_B64 $exec, %0.sub0_sub1, implicit-def $scc +# GCN-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc +--- +name: negated_cond_subreg +body: | + bb.0: + %0.sub0_sub1:sreg_128 = IMPLICIT_DEF + %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %0.sub0_sub1, implicit $exec + %2.sub0_sub1:sreg_128 = V_CMP_NE_U32_e64 %1, 1, implicit $exec + $vcc = S_AND_B64 $exec, killed %2.sub0_sub1:sreg_128, implicit-def dead $scc + S_CBRANCH_VCCNZ %bb.2, implicit killed $vcc + S_BRANCH %bb.1 + + bb.1: + S_BRANCH %bb.0 + + bb.2: + S_ENDPGM 0 +... |
