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authorJames Molloy <james.molloy@arm.com>2014-05-08 12:53:50 +0000
committerJames Molloy <james.molloy@arm.com>2014-05-08 12:53:50 +0000
commitc42ea14f7407bd676f6f2b48d1e2674743a879ba (patch)
treed203077a21f4240b17b69a505284dc631503a585
parent76f43eecb014dab210fb089a3b25ee140ecf6142 (diff)
downloadbcm5719-llvm-c42ea14f7407bd676f6f2b48d1e2674743a879ba.tar.gz
bcm5719-llvm-c42ea14f7407bd676f6f2b48d1e2674743a879ba.zip
[ARM64-BE] Teach fast-isel about how to set up sub-word stack arguments for big endian calls.
SelectionDAG already knows about this, but fast-isel was ignorant. llvm-svn: 208307
-rw-r--r--llvm/lib/Target/ARM64/ARM64FastISel.cpp8
-rw-r--r--llvm/test/CodeGen/ARM64/fast-isel-call.ll9
2 files changed, 16 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64FastISel.cpp b/llvm/lib/Target/ARM64/ARM64FastISel.cpp
index 0d4001ebf67..f8b54d033f7 100644
--- a/llvm/lib/Target/ARM64/ARM64FastISel.cpp
+++ b/llvm/lib/Target/ARM64/ARM64FastISel.cpp
@@ -1250,10 +1250,16 @@ bool ARM64FastISel::ProcessCallArgs(SmallVectorImpl<Value *> &Args,
assert(VA.isMemLoc() && "Assuming store on stack.");
// Need to store on the stack.
+ unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8;
+
+ unsigned BEAlign = 0;
+ if (ArgSize < 8 && !Subtarget->isLittleEndian())
+ BEAlign = 8 - ArgSize;
+
Address Addr;
Addr.setKind(Address::RegBase);
Addr.setReg(ARM64::SP);
- Addr.setOffset(VA.getLocMemOffset());
+ Addr.setOffset(VA.getLocMemOffset() + BEAlign);
if (!EmitStore(ArgVT, Arg, Addr))
return false;
diff --git a/llvm/test/CodeGen/ARM64/fast-isel-call.ll b/llvm/test/CodeGen/ARM64/fast-isel-call.ll
index 637ce2898f9..8d756ae5461 100644
--- a/llvm/test/CodeGen/ARM64/fast-isel-call.ll
+++ b/llvm/test/CodeGen/ARM64/fast-isel-call.ll
@@ -1,4 +1,5 @@
; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s
+; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64_be-linux-gnu | FileCheck %s --check-prefix=CHECK-BE
define void @call0() nounwind {
entry:
@@ -89,3 +90,11 @@ entry:
}
declare i32 @func2(i64 zeroext, i32 signext, i16 zeroext, i8 signext, i1 zeroext, i1 zeroext)
+
+declare void @callee_b0f(i8 %bp10, i8 %bp11, i8 %bp12, i8 %bp13, i8 %bp14, i8 %bp15, i8 %bp17, i8 %bp18, i8 %bp19)
+define void @caller_b1f() {
+entry:
+ ; CHECK-BE: strb w{{.*}}, [sp, #7]
+ call void @callee_b0f(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 42)
+ ret void
+}
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