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| author | Sanjay Patel <spatel@rotateright.com> | 2018-06-20 14:03:13 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-06-20 14:03:13 +0000 |
| commit | c1d2177f9dcbe1a1b7a9b8e441d6cbddc014db52 (patch) | |
| tree | 966c55e1b0971bc935a10d94c8ca258259b2ba01 | |
| parent | 79d2b50ca81fae77362bcd423bcd795c8d0498d8 (diff) | |
| download | bcm5719-llvm-c1d2177f9dcbe1a1b7a9b8e441d6cbddc014db52.tar.gz bcm5719-llvm-c1d2177f9dcbe1a1b7a9b8e441d6cbddc014db52.zip | |
[InstSimplify] Add tests for missed optimizations in simplifyUnsignedRangeCheck (NFC)
These are the baseline tests for the functional change in D47922.
Patch by Li Jia He!
Differential Revision: https://reviews.llvm.org/D48000
llvm-svn: 335128
| -rw-r--r-- | llvm/test/Transforms/InstSimplify/AndOrXor.ll | 69 |
1 files changed, 67 insertions, 2 deletions
diff --git a/llvm/test/Transforms/InstSimplify/AndOrXor.ll b/llvm/test/Transforms/InstSimplify/AndOrXor.ll index 8cb7be8aa1c..9447f0671e4 100644 --- a/llvm/test/Transforms/InstSimplify/AndOrXor.ll +++ b/llvm/test/Transforms/InstSimplify/AndOrXor.ll @@ -374,6 +374,19 @@ define i1 @and_icmp1(i32 %x, i32 %y) { define i1 @and_icmp2(i32 %x, i32 %y) { ; CHECK-LABEL: @and_icmp2( +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[X]], 0 +; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]] +; CHECK-NEXT: ret i1 [[TMP3]] +; + %1 = icmp ugt i32 %x, %y + %2 = icmp ne i32 %x, 0 + %3 = and i1 %1, %2 + ret i1 %3 +} + +define i1 @and_icmp3(i32 %x, i32 %y) { +; CHECK-LABEL: @and_icmp3( ; CHECK-NEXT: ret i1 false ; %1 = icmp ult i32 %x, %y @@ -382,6 +395,19 @@ define i1 @and_icmp2(i32 %x, i32 %y) { ret i1 %3 } +define i1 @and_icmp4(i32 %x, i32 %y) { +; CHECK-LABEL: @and_icmp4( +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[X]], 0 +; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP1]], [[TMP2]] +; CHECK-NEXT: ret i1 [[TMP3]] +; + %1 = icmp ugt i32 %x, %y + %2 = icmp eq i32 %x, 0 + %3 = and i1 %1, %2 + ret i1 %3 +} + define i1 @or_icmp1(i32 %x, i32 %y) { ; CHECK-LABEL: @or_icmp1( ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[Y:%.*]], 0 @@ -395,6 +421,19 @@ define i1 @or_icmp1(i32 %x, i32 %y) { define i1 @or_icmp2(i32 %x, i32 %y) { ; CHECK-LABEL: @or_icmp2( +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[X]], 0 +; CHECK-NEXT: [[TMP3:%.*]] = or i1 [[TMP1]], [[TMP2]] +; CHECK-NEXT: ret i1 [[TMP3]] +; + %1 = icmp ugt i32 %x, %y + %2 = icmp ne i32 %x, 0 + %3 = or i1 %1, %2 + ret i1 %3 +} + +define i1 @or_icmp3(i32 %x, i32 %y) { +; CHECK-LABEL: @or_icmp3( ; CHECK-NEXT: ret i1 true ; %1 = icmp uge i32 %x, %y @@ -403,8 +442,21 @@ define i1 @or_icmp2(i32 %x, i32 %y) { ret i1 %3 } -define i1 @or_icmp3(i32 %x, i32 %y) { -; CHECK-LABEL: @or_icmp3( +define i1 @or_icmp4(i32 %x, i32 %y) { +; CHECK-LABEL: @or_icmp4( +; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[X]], 0 +; CHECK-NEXT: [[TMP3:%.*]] = or i1 [[TMP1]], [[TMP2]] +; CHECK-NEXT: ret i1 [[TMP3]] +; + %1 = icmp ule i32 %x, %y + %2 = icmp ne i32 %x, 0 + %3 = or i1 %1, %2 + ret i1 %3 +} + +define i1 @or_icmp5(i32 %x, i32 %y) { +; CHECK-LABEL: @or_icmp5( ; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i32 [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: ret i1 [[TMP1]] ; @@ -414,6 +466,19 @@ define i1 @or_icmp3(i32 %x, i32 %y) { ret i1 %3 } +define i1 @or_icmp6(i32 %x, i32 %y) { +; CHECK-LABEL: @or_icmp6( +; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[X]], 0 +; CHECK-NEXT: [[TMP3:%.*]] = or i1 [[TMP1]], [[TMP2]] +; CHECK-NEXT: ret i1 [[TMP3]] +; + %1 = icmp ule i32 %x, %y + %2 = icmp eq i32 %x, 0 + %3 = or i1 %1, %2 + ret i1 %3 +} + ; PR27869 - Look through casts to eliminate cmps and bitwise logic. define i32 @and_of_zexted_icmps(i32 %i) { |
