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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-26 20:56:18 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-26 20:56:18 +0000 |
| commit | c0cad9836342a8aa6b0664412e769ae46bd49acd (patch) | |
| tree | 865a2de884791a52e625dbc0d114e820d7aa8b4f | |
| parent | 47345534aacca49fe79525e6126349d6f7991d33 (diff) | |
| download | bcm5719-llvm-c0cad9836342a8aa6b0664412e769ae46bd49acd.tar.gz bcm5719-llvm-c0cad9836342a8aa6b0664412e769ae46bd49acd.zip | |
AMDGPU: Assert SPAdj is 0
llvm-svn: 364473
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index 6e7d47bbb39..3579c2f92d2 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -1060,6 +1060,8 @@ void SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, const SIInstrInfo *TII = ST.getInstrInfo(); DebugLoc DL = MI->getDebugLoc(); + assert(SPAdj == 0 && "unhandled SP adjustment in call sequence?"); + MachineOperand &FIOp = MI->getOperand(FIOperandNum); int Index = MI->getOperand(FIOperandNum).getIndex(); |
