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authorChandler Carruth <chandlerc@gmail.com>2014-08-28 04:00:24 +0000
committerChandler Carruth <chandlerc@gmail.com>2014-08-28 04:00:24 +0000
commitc01ce6bc01369688efb0b9c8341d215a342dd9fc (patch)
tree64b6fd46db0dbd9d8e4dcde22ad20f41de298848
parentcb07a4adf34c019e8fc6b41e4520c2093d26ca95 (diff)
downloadbcm5719-llvm-c01ce6bc01369688efb0b9c8341d215a342dd9fc.tar.gz
bcm5719-llvm-c01ce6bc01369688efb0b9c8341d215a342dd9fc.zip
[x86] Fix whitespace and formatting around this function with
clang-format, no functionality changed. llvm-svn: 216646
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp9
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 8e3c8507848..a181a907047 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -10687,8 +10687,9 @@ X86TargetLowering::InsertBitToMaskVector(SDValue Op, SelectionDAG &DAG) const {
DAG.getConstant(MaxSift - IdxVal, MVT::i8));
return DAG.getNode(ISD::OR, dl, VecVT, Vec, EltInVec);
}
-SDValue
-X86TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const {
+
+SDValue X86TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
+ SelectionDAG &DAG) const {
MVT VT = Op.getSimpleValueType();
MVT EltVT = VT.getVectorElementType();
@@ -10711,8 +10712,8 @@ X86TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const {
SDValue V = Extract128BitVector(N0, IdxVal, DAG, dl);
// Insert the element into the desired half.
- unsigned NumEltsIn128 = 128/EltVT.getSizeInBits();
- unsigned IdxIn128 = IdxVal - (IdxVal/NumEltsIn128) * NumEltsIn128;
+ unsigned NumEltsIn128 = 128 / EltVT.getSizeInBits();
+ unsigned IdxIn128 = IdxVal - (IdxVal / NumEltsIn128) * NumEltsIn128;
V = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, V.getValueType(), V, N1,
DAG.getConstant(IdxIn128, MVT::i32));
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