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authorRichard Osborne <richard@xmos.com>2011-02-23 18:52:05 +0000
committerRichard Osborne <richard@xmos.com>2011-02-23 18:52:05 +0000
commitbfa5cc0e089250133566cf309e3a7cc384a34fed (patch)
tree3d69721d80adabf2cac808d9900295887cd87be6
parente71b378dc7c0fa9e43532d33827b876008126b10 (diff)
downloadbcm5719-llvm-bfa5cc0e089250133566cf309e3a7cc384a34fed.tar.gz
bcm5719-llvm-bfa5cc0e089250133566cf309e3a7cc384a34fed.zip
Add XCore intrinsic for clre instruction.
llvm-svn: 126322
-rw-r--r--llvm/include/llvm/IntrinsicsXCore.td1
-rw-r--r--llvm/lib/Target/XCore/XCoreInstrInfo.td4
-rw-r--r--llvm/test/CodeGen/XCore/events.ll3
3 files changed, 7 insertions, 1 deletions
diff --git a/llvm/include/llvm/IntrinsicsXCore.td b/llvm/include/llvm/IntrinsicsXCore.td
index 85fa00d6665..76a069e5643 100644
--- a/llvm/include/llvm/IntrinsicsXCore.td
+++ b/llvm/include/llvm/IntrinsicsXCore.td
@@ -50,4 +50,5 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
// Intrinsics for events.
def int_xcore_waitevent : Intrinsic<[llvm_ptr_ty],[], [IntrReadMem]>;
+ def int_xcore_clre : Intrinsic<[],[],[]>;
}
diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.td b/llvm/lib/Target/XCore/XCoreInstrInfo.td
index 90a725220f2..d9bd2a44bec 100644
--- a/llvm/lib/Target/XCore/XCoreInstrInfo.td
+++ b/llvm/lib/Target/XCore/XCoreInstrInfo.td
@@ -895,10 +895,12 @@ def SETV_1r : _F1R<(outs), (ins GRRegs:$r),
[(int_xcore_setv GRRegs:$r, R11)]>;
// Zero operand short
-// TODO clre, ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
+// TODO ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
// stet, geted, getet, getkep, getksp, setkep, getid, kret, dcall, dret,
// dentsp, drestsp
+def CLRE_0R : _F0R<(outs), (ins), "clre", [(int_xcore_clre)]>;
+
let Defs = [R11] in
def GETID_0R : _F0R<(outs), (ins),
"get r11, id",
diff --git a/llvm/test/CodeGen/XCore/events.ll b/llvm/test/CodeGen/XCore/events.ll
index 32b5a60977c..4fc2f26d1b6 100644
--- a/llvm/test/CodeGen/XCore/events.ll
+++ b/llvm/test/CodeGen/XCore/events.ll
@@ -2,10 +2,13 @@
declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
declare i8* @llvm.xcore.waitevent()
+declare void @llvm.xcore.clre()
define i32 @f(i8 addrspace(1)* %r) nounwind {
; CHECK: f:
entry:
+; CHECK: clre
+ call void @llvm.xcore.clre()
call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1))
call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L2))
%goto_addr = call i8* @llvm.xcore.waitevent()
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