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author | Craig Topper <craig.topper@intel.com> | 2018-07-22 05:16:49 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-07-22 05:16:49 +0000 |
commit | bf61113e4f57dd115e583828afb51b19ea53cf87 (patch) | |
tree | c5296b29fe444b7b49ec75c3f9a4e782def0ed91 | |
parent | d8f80e90ce31e7abd808050654fd1446add58d1f (diff) | |
download | bcm5719-llvm-bf61113e4f57dd115e583828afb51b19ea53cf87.tar.gz bcm5719-llvm-bf61113e4f57dd115e583828afb51b19ea53cf87.zip |
[SelectionDAGBuilder] Restrict vector reduction check to types with a power of 2 number of elements.
The check for the shuffles usages probably isn't correct for non power of 2 vectors.
llvm-svn: 337651
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 73a07d56a41..59b0e625baf 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -2668,6 +2668,10 @@ static bool isVectorReductionOp(const User *I) { } unsigned ElemNum = Inst->getType()->getVectorNumElements(); + // Ensure the reduction size is a power of 2. + if (!isPowerOf2_32(ElemNum)) + return false; + unsigned ElemNumToReduce = ElemNum; // Do DFS search on the def-use chain from the given instruction. We only |