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authorChris Lattner <sabre@nondot.org>2009-09-18 18:10:19 +0000
committerChris Lattner <sabre@nondot.org>2009-09-18 18:10:19 +0000
commitbf1a769dcb1068163ec5d4d9fd600017be2d7ab4 (patch)
tree4b38e52c2d39b4ffdaeb3ffc438c747728f647af
parent1e64038bcb41bb9b40dd8399ed7409ebf87b72e3 (diff)
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llvm-svn: 82236
-rw-r--r--llvm/utils/TableGen/AsmWriterEmitter.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index 720abe92360..29bcb399ad6 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -746,6 +746,11 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
// elements in the vector.
std::reverse(Instructions.begin(), Instructions.end());
+
+ // Now that we've emitted all of the operand info that fit into 32 bits, emit
+ // information for those instructions that are left. This is a less dense
+ // encoding, but we expect the main 32-bit table to handle the majority of
+ // instructions.
if (!Instructions.empty()) {
// Find the opcode # of inline asm.
O << " switch (MI->getOpcode()) {\n";
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