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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-11-05 02:46:53 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-11-05 02:46:53 +0000 |
| commit | bed42a7320862a23ff753fd1f5c868c11493d37a (patch) | |
| tree | 4dd4db0b8e479aab85317760da5f7d3ef897c696 | |
| parent | 0caf6dadce2026fe826e7a40b3766cf412f84e89 (diff) | |
| download | bcm5719-llvm-bed42a7320862a23ff753fd1f5c868c11493d37a.tar.gz bcm5719-llvm-bed42a7320862a23ff753fd1f5c868c11493d37a.zip | |
AMDGPU: Make addr64 atomic operand order consistent
vaddr comes before srsrc in every other MUBUF instruction,
and is the order it is printed.
llvm-svn: 252139
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index 61e9022c47b..334c9061a22 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -2391,7 +2391,7 @@ multiclass MUBUF_Atomic <mubuf op, string name, RegisterClass rc, defm _ADDR64 : MUBUFAtomicAddr64_m < op, name#"_addr64", (outs), - (ins rc:$vdata, SReg_128:$srsrc, VReg_64:$vaddr, + (ins rc:$vdata, VReg_64:$vaddr, SReg_128:$srsrc, SCSrc_32:$soffset, mbuf_offset:$offset, slc:$slc), name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#"$slc", [], 0 >; @@ -2410,7 +2410,7 @@ multiclass MUBUF_Atomic <mubuf op, string name, RegisterClass rc, defm _RTN_ADDR64 : MUBUFAtomicAddr64_m < op, name#"_rtn_addr64", (outs rc:$vdata), - (ins rc:$vdata_in, SReg_128:$srsrc, VReg_64:$vaddr, + (ins rc:$vdata_in, VReg_64:$vaddr, SReg_128:$srsrc, SCSrc_32:$soffset, mbuf_offset:$offset, slc:$slc), name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#" glc"#"$slc", [(set vt:$vdata, |
