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authorEvan Cheng <evan.cheng@apple.com>2006-01-17 00:19:47 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-01-17 00:19:47 +0000
commitbec9d720b0791c845d4631c257965aeb6fcfb70d (patch)
tree5fdbf977f1877530c2f4e2424a3a41ebcb46b4f0
parent0a15089ad0f545c38556ee14abbd0bc2983b8d52 (diff)
downloadbcm5719-llvm-bec9d720b0791c845d4631c257965aeb6fcfb70d.tar.gz
bcm5719-llvm-bec9d720b0791c845d4631c257965aeb6fcfb70d.zip
Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should
read a flag. llvm-svn: 25378
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp18
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.td4
2 files changed, 12 insertions, 10 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index bd53e61ab35..bc8459fd0a4 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -543,16 +543,17 @@ X86TargetLowering::LowerCCCCallTo(SDOperand Chain, const Type *RetTy,
Chain = Hi.getValue(1);
break;
}
- case MVT::f32:
case MVT::f64: {
std::vector<MVT::ValueType> Tys;
Tys.push_back(MVT::f64);
Tys.push_back(MVT::Other);
+ Tys.push_back(MVT::Flag);
std::vector<SDOperand> Ops;
Ops.push_back(Chain);
Ops.push_back(InFlag);
RetVal = DAG.getNode(X86ISD::FP_GET_RESULT, Tys, Ops);
- Chain = RetVal.getValue(1);
+ Chain = RetVal.getValue(1);
+ InFlag = RetVal.getValue(2);
if (X86ScalarSSE) {
unsigned Size = MVT::getSizeInBits(MVT::f64)/8;
MachineFunction &MF = DAG.getMachineFunction();
@@ -565,12 +566,12 @@ X86TargetLowering::LowerCCCCallTo(SDOperand Chain, const Type *RetTy,
Ops.push_back(RetVal);
Ops.push_back(StackSlot);
Ops.push_back(DAG.getValueType(RetTyVT));
+ Ops.push_back(InFlag);
Chain = DAG.getNode(X86ISD::FST, Tys, Ops);
RetVal = DAG.getLoad(RetTyVT, Chain, StackSlot,
DAG.getSrcValue(NULL));
Chain = RetVal.getValue(1);
- } else if (RetTyVT == MVT::f32)
- RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal);
+ }
break;
}
}
@@ -1059,16 +1060,17 @@ X86TargetLowering::LowerFastCCCallTo(SDOperand Chain, const Type *RetTy,
Chain = Hi.getValue(1);
break;
}
- case MVT::f32:
case MVT::f64: {
std::vector<MVT::ValueType> Tys;
Tys.push_back(MVT::f64);
Tys.push_back(MVT::Other);
+ Tys.push_back(MVT::Flag);
std::vector<SDOperand> Ops;
Ops.push_back(Chain);
Ops.push_back(InFlag);
RetVal = DAG.getNode(X86ISD::FP_GET_RESULT, Tys, Ops);
- Chain = RetVal.getValue(1);
+ Chain = RetVal.getValue(1);
+ InFlag = RetVal.getValue(2);
if (X86ScalarSSE) {
unsigned Size = MVT::getSizeInBits(MVT::f64)/8;
MachineFunction &MF = DAG.getMachineFunction();
@@ -1081,12 +1083,12 @@ X86TargetLowering::LowerFastCCCallTo(SDOperand Chain, const Type *RetTy,
Ops.push_back(RetVal);
Ops.push_back(StackSlot);
Ops.push_back(DAG.getValueType(RetTyVT));
+ Ops.push_back(InFlag);
Chain = DAG.getNode(X86ISD::FST, Tys, Ops);
RetVal = DAG.getLoad(RetTyVT, Chain, StackSlot,
DAG.getSrcValue(NULL));
Chain = RetVal.getValue(1);
- } else if (RetTyVT == MVT::f32)
- RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal);
+ }
break;
}
}
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 5a19218cafc..8d635c49e40 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -93,14 +93,14 @@ def X86call : SDNode<"X86ISD::CALL", SDT_X86Call,
[SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>;
def X86fpget : SDNode<"X86ISD::FP_GET_RESULT", SDTX86FpGet,
- [SDNPHasChain, SDNPInFlag]>;
+ [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>;
def X86fpset : SDNode<"X86ISD::FP_SET_RESULT", SDTX86FpSet,
[SDNPHasChain, SDNPOutFlag]>;
def X86fld : SDNode<"X86ISD::FLD", SDTX86Fld,
[SDNPHasChain]>;
def X86fst : SDNode<"X86ISD::FST", SDTX86Fst,
- [SDNPHasChain]>;
+ [SDNPHasChain, SDNPInFlag]>;
def X86fild : SDNode<"X86ISD::FILD", SDTX86Fild,
[SDNPHasChain]>;
def X86fp_to_i16mem : SDNode<"X86ISD::FP_TO_INT16_IN_MEM", SDTX86FpToIMem,
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