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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-01-11 18:02:13 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-01-11 18:02:13 +0000 |
| commit | be6fa82ee56ea48068061d1fe77138f9b5bc1c51 (patch) | |
| tree | 4765c411add3b787eb0700b752429e94467d0042 | |
| parent | e156e9ba0fe5a6f6c8b4f6e020eb17d947de1ffc (diff) | |
| download | bcm5719-llvm-be6fa82ee56ea48068061d1fe77138f9b5bc1c51.tar.gz bcm5719-llvm-be6fa82ee56ea48068061d1fe77138f9b5bc1c51.zip | |
[Hexagon] Impose limits on container sizes in HexagonGenInsert
With over 300k virtual registers, the size of the data exceeded 12GB.
Impose limits on how much information is collected.
llvm-svn: 322299
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonGenInsert.cpp | 23 |
1 files changed, 20 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp index c1841d735b8..9fb7d26598a 100644 --- a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp +++ b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp @@ -55,6 +55,12 @@ static cl::opt<unsigned> VRegDistCutoff("insert-dist-cutoff", cl::init(30U), cl::Hidden, cl::ZeroOrMore, cl::desc("Vreg distance cutoff for insert " "generation.")); +// Limit the container sizes for extreme cases where we run out of memory. +static cl::opt<unsigned> MaxORLSize("insert-max-orl", cl::init(4096), + cl::Hidden, cl::ZeroOrMore, cl::desc("Maximum size of OrderedRegisterList")); +static cl::opt<unsigned> MaxIFMSize("insert-max-ifmap", cl::init(1024), + cl::Hidden, cl::ZeroOrMore, cl::desc("Maximum size of IFMap")); + static cl::opt<bool> OptTiming("insert-timing", cl::init(false), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable timing of insert generation")); static cl::opt<bool> OptTimingDetail("insert-timing-detail", cl::init(false), @@ -86,6 +92,7 @@ namespace { struct RegisterSet : private BitVector { RegisterSet() = default; explicit RegisterSet(unsigned s, bool t = false) : BitVector(s, t) {} + RegisterSet(const RegisterSet &RS) : BitVector(RS) {} using BitVector::clear; @@ -370,9 +377,11 @@ namespace { class OrderedRegisterList { using ListType = std::vector<unsigned>; + const unsigned MaxSize; public: - OrderedRegisterList(const RegisterOrdering &RO) : Ord(RO) {} + OrderedRegisterList(const RegisterOrdering &RO) + : MaxSize(MaxORLSize), Ord(RO) {} void insert(unsigned VR); void remove(unsigned VR); @@ -433,12 +442,17 @@ void OrderedRegisterList::insert(unsigned VR) { Seq.push_back(VR); else Seq.insert(L, VR); + + unsigned S = Seq.size(); + if (S > MaxSize) + Seq.resize(MaxSize); + assert(Seq.size() <= MaxSize); } void OrderedRegisterList::remove(unsigned VR) { iterator L = std::lower_bound(Seq.begin(), Seq.end(), VR, Ord); - assert(L != Seq.end()); - Seq.erase(L); + if (L != Seq.end()) + Seq.erase(L); } namespace { @@ -950,6 +964,9 @@ void HexagonGenInsert::collectInBlock(MachineBasicBlock *B, continue; findRecordInsertForms(VR, AVs); + // Stop if the map size is too large. + if (IFMap.size() > MaxIFMSize) + return; } } |

