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| author | Derek Schuff <dschuff@google.com> | 2012-04-27 23:27:17 +0000 |
|---|---|---|
| committer | Derek Schuff <dschuff@google.com> | 2012-04-27 23:27:17 +0000 |
| commit | bbf8b83e90dc1e26a705c54680a18a391638e6f0 (patch) | |
| tree | ed4d3a68711af7ebd8631f6ecd19424bec0f133f | |
| parent | 5f0d1b462c4c774479d7567605af32c4b638ee10 (diff) | |
| download | bcm5719-llvm-bbf8b83e90dc1e26a705c54680a18a391638e6f0.tar.gz bcm5719-llvm-bbf8b83e90dc1e26a705c54680a18a391638e6f0.zip | |
Fix fastcc structure return with fast-isel on x86-32
On x86-32, structure return via sret lets the callee pop the hidden
pointer argument off the stack, which the caller then re-pushes.
However if the calling convention is fastcc, then a register is used
instead, and the caller should not adjust the stack. This is
implemented with a check of IsTailCallConvention
X86TargetLowering::LowerCall but is now checked properly in
X86FastISel::DoSelectCall.
llvm-svn: 155745
| -rw-r--r-- | llvm/lib/Target/X86/X86FastISel.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/fast-isel-x86.ll | 14 |
2 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index eca0e780828..d757926c715 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -1858,6 +1858,8 @@ bool X86FastISel::DoSelectCall(const Instruction *I, const char *MemIntName) { unsigned AdjStackUp = TII.getCallFrameDestroyOpcode(); unsigned NumBytesCallee = 0; if (!Subtarget->is64Bit() && !Subtarget->isTargetWindows() && + !(CS.getCallingConv() == CallingConv::Fast || + CS.getCallingConv() == CallingConv::GHC) && CS.paramHasAttr(1, Attribute::StructRet)) NumBytesCallee = 4; BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(AdjStackUp)) diff --git a/llvm/test/CodeGen/X86/fast-isel-x86.ll b/llvm/test/CodeGen/X86/fast-isel-x86.ll index b9598bb465c..bd5c91491e0 100644 --- a/llvm/test/CodeGen/X86/fast-isel-x86.ll +++ b/llvm/test/CodeGen/X86/fast-isel-x86.ll @@ -46,3 +46,17 @@ entry: ; CHECK: addl $40 } declare void @test3sret(%struct.a* sret) + +; Check that fast-isel sret works with fastcc (and does not callee-pop) +define void @test4() nounwind ssp { +entry: + %tmp = alloca %struct.a, align 8 + call fastcc void @test4fastccsret(%struct.a* sret %tmp) + ret void +; CHECK: test4: +; CHECK: subl $44 +; CHECK: leal 16(%esp) +; CHECK: calll _test4fastccsret +; CHECK addl $40 +} +declare fastcc void @test4fastccsret(%struct.a* sret) |

