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author | Jim Grosbach <grosbach@apple.com> | 2011-12-14 21:49:24 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2011-12-14 21:49:24 +0000 |
commit | bb18fb4f52269b6ca1f32c13010fd61bc99df859 (patch) | |
tree | 0d9dd6387ccc36d2551d6ebf68077121af505e76 | |
parent | 109f25c966ac1648a5fe60f3ba76c438e24f8f9c (diff) | |
download | bcm5719-llvm-bb18fb4f52269b6ca1f32c13010fd61bc99df859.tar.gz bcm5719-llvm-bb18fb4f52269b6ca1f32c13010fd61bc99df859.zip |
ARM NEON fix alignment encoding for VST2 w/ writeback.
Add tests for w/ writeback instruction parsing and encoding.
llvm-svn: 146594
-rw-r--r-- | llvm/lib/Target/ARM/ARMInstrNEON.td | 8 | ||||
-rw-r--r-- | llvm/test/MC/ARM/neon-vst-encoding.s | 12 |
2 files changed, 16 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrNEON.td b/llvm/lib/Target/ARM/ARMInstrNEON.td index ff647deaa49..1caadd694da 100644 --- a/llvm/lib/Target/ARM/ARMInstrNEON.td +++ b/llvm/lib/Target/ARM/ARMInstrNEON.td @@ -1530,7 +1530,7 @@ multiclass VST2DWB<bits<4> op11_8, bits<4> op7_4, string Dt, "vst2", Dt, "$Vd, $Rn!", "$Rn.addr = $wb", []> { let Rm = 0b1101; // NLdSt will assign to the right encoding bits. - let Inst{4} = Rn{4}; + let Inst{5-4} = Rn{5-4}; let DecoderMethod = "DecodeVSTInstruction"; let AsmMatchConverter = "cvtVSTwbFixed"; } @@ -1538,7 +1538,7 @@ multiclass VST2DWB<bits<4> op11_8, bits<4> op7_4, string Dt, (ins addrmode6:$Rn, rGPR:$Rm, VdTy:$Vd), IIC_VLD1u, "vst2", Dt, "$Vd, $Rn, $Rm", "$Rn.addr = $wb", []> { - let Inst{4} = Rn{4}; + let Inst{5-4} = Rn{5-4}; let DecoderMethod = "DecodeVSTInstruction"; let AsmMatchConverter = "cvtVSTwbRegister"; } @@ -1549,7 +1549,7 @@ multiclass VST2QWB<bits<4> op7_4, string Dt> { "vst2", Dt, "$Vd, $Rn!", "$Rn.addr = $wb", []> { let Rm = 0b1101; // NLdSt will assign to the right encoding bits. - let Inst{4} = Rn{4}; + let Inst{5-4} = Rn{5-4}; let DecoderMethod = "DecodeVSTInstruction"; let AsmMatchConverter = "cvtVSTwbFixed"; } @@ -1558,7 +1558,7 @@ multiclass VST2QWB<bits<4> op7_4, string Dt> { IIC_VLD1u, "vst2", Dt, "$Vd, $Rn, $Rm", "$Rn.addr = $wb", []> { - let Inst{4} = Rn{4}; + let Inst{5-4} = Rn{5-4}; let DecoderMethod = "DecodeVSTInstruction"; let AsmMatchConverter = "cvtVSTwbRegister"; } diff --git a/llvm/test/MC/ARM/neon-vst-encoding.s b/llvm/test/MC/ARM/neon-vst-encoding.s index 69bdd242fe1..a4c532a98b5 100644 --- a/llvm/test/MC/ARM/neon-vst-encoding.s +++ b/llvm/test/MC/ARM/neon-vst-encoding.s @@ -37,6 +37,12 @@ vst2.8 {d16, d17, d18, d19}, [r0, :64] vst2.16 {d16, d17, d18, d19}, [r0, :128] vst2.32 {d16, d17, d18, d19}, [r0, :256] + vst2.8 {d16, d17}, [r0, :64]! + vst2.16 {q15}, [r0, :128]! + vst2.32 {d14, d15}, [r0]! + vst2.8 {d16, d17, d18, d19}, [r0, :64]! + vst2.16 {d18-d21}, [r0, :128]! + vst2.32 {q4, q5}, [r0, :256]! @ CHECK: vst2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x40,0xf4] @ CHECK: vst2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x40,0xf4] @@ -44,6 +50,12 @@ @ CHECK: vst2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x40,0xf4] @ CHECK: vst2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x40,0xf4] @ CHECK: vst2.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x03,0x40,0xf4] +@ CHECK: vst2.8 {d16, d17}, [r0, :64]! @ encoding: [0x1d,0x08,0x40,0xf4] +@ CHECK: vst2.16 {d30, d31}, [r0, :128]! @ encoding: [0x6d,0xe8,0x40,0xf4] +@ CHECK: vst2.32 {d14, d15}, [r0]! @ encoding: [0x8d,0xe8,0x00,0xf4] +@ CHECK: vst2.8 {d16, d17, d18, d19}, [r0, :64]! @ encoding: [0x1d,0x03,0x40,0xf4] +@ CHECK: vst2.16 {d18, d19, d20, d21}, [r0, :128]! @ encoding: [0x6d,0x23,0x40,0xf4] +@ CHECK: vst2.32 {d8, d9, d10, d11}, [r0, :256]! @ encoding: [0xbd,0x83,0x00,0xf4] @ vst3.8 {d16, d17, d18}, [r0, :64] |