summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@intel.com>2019-04-09 19:23:37 +0000
committerCraig Topper <craig.topper@intel.com>2019-04-09 19:23:37 +0000
commitba55a40fd07f14fc2ba85e741f010dba1af19de5 (patch)
tree6feef59a75f8ef5428f45a031cbfeae6887fd455
parent8e2871cd2c2e6d9e2dc74ac25a86d28219596534 (diff)
downloadbcm5719-llvm-ba55a40fd07f14fc2ba85e741f010dba1af19de5.tar.gz
bcm5719-llvm-ba55a40fd07f14fc2ba85e741f010dba1af19de5.zip
[AArch64] Add test case to show missed opportunity to remove a shift before tbnz when the shift has been zero extended from i32 to i64. NFC
This pattern showed up in D60358 and it was suggested I had a test and fix that separately. llvm-svn: 358030
-rw-r--r--llvm/test/CodeGen/AArch64/tbz-tbnz.ll21
1 files changed, 21 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/tbz-tbnz.ll b/llvm/test/CodeGen/AArch64/tbz-tbnz.ll
index 8dc943b7962..fa792509d4e 100644
--- a/llvm/test/CodeGen/AArch64/tbz-tbnz.ll
+++ b/llvm/test/CodeGen/AArch64/tbz-tbnz.ll
@@ -359,3 +359,24 @@ then:
end:
ret void
}
+
+define void @test20(i32 %in) {
+; CHECK-LABEL: @test20
+ %shl = shl i32 %in, 3
+ %zext = zext i32 %shl to i64
+ %and = and i64 %zext, 32
+ %cond = icmp eq i64 %and, 0
+ br i1 %cond, label %then, label %end
+
+; FIXME: Should be no lsl
+; CHECK: lsl w8, w0, #3
+; CHECK: tbnz w8, #5
+
+then:
+ call void @t()
+ br label %end
+
+end:
+ ret void
+}
+
OpenPOWER on IntegriCloud