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| author | Craig Topper <craig.topper@gmail.com> | 2016-01-26 06:10:15 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-01-26 06:10:15 +0000 |
| commit | b9c932f26e24e4df776ff91a0efbcb6e8eb38ecc (patch) | |
| tree | c616b3a0750565147ec2f836230f4b1f9e3f2c3f | |
| parent | d6cea14cbbac0133b6d61dba4cc6f139af84d005 (diff) | |
| download | bcm5719-llvm-b9c932f26e24e4df776ff91a0efbcb6e8eb38ecc.tar.gz bcm5719-llvm-b9c932f26e24e4df776ff91a0efbcb6e8eb38ecc.zip | |
[X86] Mark LDS/LES as not being allowed in 64-bit mode.
Their opcodes are used as part of the VEX prefix in 64-bit mode. Clearly the disassembler implicitly decoded them as AVX instructions in 64-bit mode, but I think the AsmParser would have encoded them.
llvm-svn: 258793
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSystem.td | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td index a97d1e5c86d..97dcd40d212 100644 --- a/llvm/lib/Target/X86/X86InstrSystem.td +++ b/llvm/lib/Target/X86/X86InstrSystem.td @@ -339,9 +339,11 @@ def POPGS64 : I<0xa9, RawFrm, (outs), (ins), def LDS16rm : I<0xc5, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src), - "lds{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize16; + "lds{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize16, + Requires<[Not64BitMode]>; def LDS32rm : I<0xc5, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src), - "lds{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize32; + "lds{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize32, + Requires<[Not64BitMode]>; def LSS16rm : I<0xb2, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src), "lss{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize16; @@ -351,9 +353,11 @@ def LSS64rm : RI<0xb2, MRMSrcMem, (outs GR64:$dst), (ins opaque80mem:$src), "lss{q}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB; def LES16rm : I<0xc4, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src), - "les{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize16; + "les{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize16, + Requires<[Not64BitMode]>; def LES32rm : I<0xc4, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src), - "les{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize32; + "les{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize32, + Requires<[Not64BitMode]>; def LFS16rm : I<0xb4, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src), "lfs{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize16; |
