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| author | Craig Topper <craig.topper@intel.com> | 2019-05-20 16:58:38 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-05-20 16:58:38 +0000 |
| commit | b93f8ae7a78bd260970d4d28bcd6407b778c0a28 (patch) | |
| tree | fd56360c541432a2b07ee4511dade31c22d35b48 | |
| parent | cac6b76a764cf4051072ad7a032a64bcfab5d5cf (diff) | |
| download | bcm5719-llvm-b93f8ae7a78bd260970d4d28bcd6407b778c0a28.tar.gz bcm5719-llvm-b93f8ae7a78bd260970d4d28bcd6407b778c0a28.zip | |
[X86] Add icelake-client and tremont model numbers to compiler-rt's implementation of __builtin_cpu_is.
llvm-svn: 361175
| -rw-r--r-- | compiler-rt/lib/builtins/cpu_model.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/compiler-rt/lib/builtins/cpu_model.c b/compiler-rt/lib/builtins/cpu_model.c index fcc80b5620d..1290d4ce843 100644 --- a/compiler-rt/lib/builtins/cpu_model.c +++ b/compiler-rt/lib/builtins/cpu_model.c @@ -362,6 +362,12 @@ static void getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, *Subtype = INTEL_COREI7_CANNONLAKE; // "cannonlake" break; + // Icelake: + case 0x7e: + *Type = INTEL_COREI7; + *Subtype = INTEL_COREI7_ICELAKE_CLIENT; // "icelake-client" + break; + case 0x1c: // Most 45 nm Intel Atom processors case 0x26: // 45 nm Atom Lincroft case 0x27: // 32 nm Atom Medfield @@ -387,6 +393,9 @@ static void getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, case 0x7a: *Type = INTEL_GOLDMONT_PLUS; break; + case 0x86: + *Type = INTEL_TREMONT; + break; case 0x57: *Type = INTEL_KNL; // knl |
