This reverts commit r211533 and r211539.

 Revert "Fix PR20056: Implement pseudo LDR <reg>, =<literal/label> for AArch64"
 Revert "Fix cmake build."

It was missing a file.

llvm-svn: 211540

2 files changed, 1 insertions, 75 deletions

diff --git a/llvm/include/llvm/MC/MCStreamer.h b/llvm/include/llvm/MC/MCStreamer.h
index cd1fa9b6a8f..bf224979def 100644
--- a/llvm/include/llvm/MC/MCStreamer.h
+++ b/llvm/include/llvm/MC/MCStreamer.h
@@ -86,27 +86,6 @@ public:
   virtual void finish();
 };
 
-class AArch64TargetStreamer : public MCTargetStreamer {
-public:
-  AArch64TargetStreamer(MCStreamer &S);
-  ~AArch64TargetStreamer();
-
-
-  void finish() override;
-
-  /// Callback used to implement the ldr= pseudo.
-  /// Add a new entry to the constant pool for the current section and return an
-  /// MCExpr that can be used to refer to the constant pool location.
-  const MCExpr *addConstantPoolEntry(const MCExpr *);
-
-  /// Callback used to implemnt the .ltorg directive.
-  /// Emit contents of constant pool for the current section.
-  void emitCurrentConstantPool();
-
-private:
-  std::unique_ptr<AssemblerConstantPools> ConstantPools;
-};
-
 // FIXME: declared here because it is used from
 // lib/CodeGen/AsmPrinter/ARMException.cpp.
 class ARMTargetStreamer : public MCTargetStreamer {
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index c4d840d90b5..5d363a00dc0 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -43,11 +43,6 @@ private:
   MCSubtargetInfo &STI;
   MCAsmParser &Parser;
 
-  AArch64TargetStreamer &getTargetStreamer() {
-    MCTargetStreamer &TS = *getParser().getStreamer().getTargetStreamer();
-    return static_cast<AArch64TargetStreamer &>(TS);
-  }
-
   MCAsmParser &getParser() const { return Parser; }
   MCAsmLexer &getLexer() const { return Parser.getLexer(); }
 
@@ -72,7 +67,6 @@ private:
   bool parseDirectiveTLSDescCall(SMLoc L);
 
   bool parseDirectiveLOH(StringRef LOH, SMLoc L);
-  bool parseDirectiveLtorg(SMLoc L);
 
   bool validateInstruction(MCInst &Inst, SmallVectorImpl<SMLoc> &Loc);
   bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
@@ -111,8 +105,6 @@ public:
                  const MCTargetOptions &Options)
       : MCTargetAsmParser(), STI(_STI), Parser(_Parser) {
     MCAsmParserExtension::Initialize(_Parser);
-    if (Parser.getStreamer().getTargetStreamer() == nullptr)
-      new AArch64TargetStreamer(Parser.getStreamer());
 
     // Initialize the set of available features.
     setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
@@ -3012,43 +3004,6 @@ bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode,
     Operands.push_back(AArch64Operand::CreateImm(ImmVal, S, E, getContext()));
     return false;
   }
-  case AsmToken::Equal: {
-    SMLoc Loc = Parser.getTok().getLoc();
-    if (Mnemonic != "ldr") // only parse for ldr pseudo (e.g. ldr r0, =val)
-      return Error(Loc, "unexpected token in operand");
-    Parser.Lex(); // Eat '='
-    const MCExpr *SubExprVal;
-    if (getParser().parseExpression(SubExprVal))
-      return true;
-
-    MCContext& Ctx = getContext();
-    E = SMLoc::getFromPointer(Loc.getPointer() - 1);
-    // If the op is an imm and can be fit into a mov, then replace ldr with mov.
-    if (isa<MCConstantExpr>(SubExprVal) && Operands.size() >= 2 &&
-        static_cast<AArch64Operand &>(*Operands[1]).isReg()) {
-      bool IsXReg =  AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains(
-            Operands[1]->getReg());
-      uint64_t Imm = (cast<MCConstantExpr>(SubExprVal))->getValue();
-      uint32_t ShiftAmt = 0, MaxShiftAmt = IsXReg ? 48 : 16;
-      while(Imm > 0xFFFF && countTrailingZeros(Imm) >= 16) {
-        ShiftAmt += 16;
-        Imm >>= 16;
-      }
-      if (ShiftAmt <= MaxShiftAmt && Imm <= 0xFFFF) {
-          Operands[0] = AArch64Operand::CreateToken("movz", false, Loc, Ctx);
-          Operands.push_back(AArch64Operand::CreateImm(
-                     MCConstantExpr::Create(Imm, Ctx), S, E, Ctx));
-        if (ShiftAmt)
-          Operands.push_back(AArch64Operand::CreateShiftExtend(AArch64_AM::LSL,
-                     ShiftAmt, true, S, E, Ctx));
-        return false;
-      }
-    }
-    // If it is a label or an imm that cannot fit in a movz, put it into CP.
-    const MCExpr *CPLoc = getTargetStreamer().addConstantPoolEntry(SubExprVal);
-    Operands.push_back(AArch64Operand::CreateImm(CPLoc, S, E, Ctx));
-    return false;
-  }
   }
 }
 
@@ -3855,8 +3810,7 @@ bool AArch64AsmParser::ParseDirective(AsmToken DirectiveID) {
     return parseDirectiveWord(8, Loc);
   if (IDVal == ".tlsdesccall")
     return parseDirectiveTLSDescCall(Loc);
-  if (IDVal == ".ltorg" || IDVal == ".pool")
-    return parseDirectiveLtorg(Loc);
+
   return parseDirectiveLOH(IDVal, Loc);
 }
 
@@ -3957,13 +3911,6 @@ bool AArch64AsmParser::parseDirectiveLOH(StringRef IDVal, SMLoc Loc) {
   return false;
 }
 
-/// parseDirectiveLtorg
-///  ::= .ltorg | .pool
-bool AArch64AsmParser::parseDirectiveLtorg(SMLoc L) {
-  getTargetStreamer().emitCurrentConstantPool();
-  return false;
-}
-
 bool
 AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
                                     AArch64MCExpr::VariantKind &ELFRefKind,