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| author | Craig Topper <craig.topper@intel.com> | 2017-12-15 01:03:40 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-12-15 01:03:40 +0000 |
| commit | b89bc20a64d383ad90976cd8d8fcb2df3775df6d (patch) | |
| tree | 4915971ab1ac0aee82e95c9690d531e1764d9e31 | |
| parent | 212070486dbc22a328dc2644f979b3a62a2a87e3 (diff) | |
| download | bcm5719-llvm-b89bc20a64d383ad90976cd8d8fcb2df3775df6d.tar.gz bcm5719-llvm-b89bc20a64d383ad90976cd8d8fcb2df3775df6d.zip | |
[X86] Make ISD::INSERT_SUBVECTOR v8i1 legal with AVX512F because we should be custom lowering inserting v1i1 into v8i1 under this.
I don't have a test case at the moment. Just noticed while auditing things.
llvm-svn: 320780
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 84a8592b5dd..012d3553809 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -1271,6 +1271,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM, setOperationAction(ISD::SMUL_LOHI, MVT::v16i32, Custom); setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v1i1, Custom); + setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8i1, Custom); setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v16i1, Custom); setOperationAction(ISD::BUILD_VECTOR, MVT::v1i1, Custom); setOperationAction(ISD::SELECT, MVT::v8f64, Custom); @@ -1521,7 +1522,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM, setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i1, Custom); setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i1, Custom); - setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8i1, Custom); setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v4i1, Custom); // Extends from v2i1/v4i1 masks to 128-bit vectors. |
