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authorEric Christopher <echristo@gmail.com>2016-01-08 00:34:44 +0000
committerEric Christopher <echristo@gmail.com>2016-01-08 00:34:44 +0000
commitb793230797b6e34898c56fe92da3f69f17aa6654 (patch)
tree734080097f03e965baa85d2b30211f8645b108c7
parent26d84e8097e831ce9e7d8fcafdc094544ede7db1 (diff)
downloadbcm5719-llvm-b793230797b6e34898c56fe92da3f69f17aa6654.tar.gz
bcm5719-llvm-b793230797b6e34898c56fe92da3f69f17aa6654.zip
Add some testing for thumb1 and thumb2 inline asm immediate constraints
and fix a couple of bugs on inspection. Also fixes PR26061. llvm-svn: 257122
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp4
-rw-r--r--llvm/test/CodeGen/ARM/inlineasm-imm-thumb.ll20
-rw-r--r--llvm/test/CodeGen/ARM/inlineasm-imm-thumb2.ll31
3 files changed, 53 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index d49f46004d1..fc57d83ce1e 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -11475,7 +11475,7 @@ void ARMTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
return;
case 'J':
- if (Subtarget->isThumb()) { // FIXME thumb2
+ if (Subtarget->isThumb1Only()) {
// This must be a constant between -255 and -1, for negated ADD
// immediates. This can be used in GCC with an "n" modifier that
// prints the negated value, for use with SUB instructions. It is
@@ -11544,7 +11544,7 @@ void ARMTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
return;
case 'M':
- if (Subtarget->isThumb()) { // FIXME thumb2
+ if (Subtarget->isThumb1Only()) {
// This must be a multiple of 4 between 0 and 1020, for
// ADD sp + immediate.
if ((CVal >= 0 && CVal <= 1020) && ((CVal & 3) == 0))
diff --git a/llvm/test/CodeGen/ARM/inlineasm-imm-thumb.ll b/llvm/test/CodeGen/ARM/inlineasm-imm-thumb.ll
new file mode 100644
index 00000000000..80be870743f
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/inlineasm-imm-thumb.ll
@@ -0,0 +1,20 @@
+; RUN: llc -mtriple=thumbv5-none-linux-gnueabi -no-integrated-as %s -o /dev/null
+
+; Test thumb-mode "I" constraint, for any Data Processing immediate.
+define void @testI() {
+ tail call void asm sideeffect ".word $0", "I"( i32 255 ) nounwind
+ ret void
+}
+
+; Test thumb-mode "J" constraint, for compatibility with unknown use in GCC.
+define void @testJ() {
+ tail call void asm sideeffect ".word $0", "J"( i32 -254 ) nounwind
+ ret void
+}
+
+; Test thumb-mode "L" constraint, for negated Data Processing immediates.
+define void @testL() {
+ tail call void asm sideeffect ".word $0", "L"( i32 -7 ) nounwind
+ ret void
+}
+
diff --git a/llvm/test/CodeGen/ARM/inlineasm-imm-thumb2.ll b/llvm/test/CodeGen/ARM/inlineasm-imm-thumb2.ll
new file mode 100644
index 00000000000..c54f3b8aa5f
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/inlineasm-imm-thumb2.ll
@@ -0,0 +1,31 @@
+; RUN: llc -mtriple=thumbv7-linux-gnu -no-integrated-as %s -o /dev/null
+
+; Test thumb2-mode "I" constraint, for any Data Processing immediate.
+define i32 @testI(i32 %x) {
+ %y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 65280 ) nounwind
+ ret i32 %y
+}
+
+; Test thumb2-mode "J" constraint, for compatibility with unknown use in GCC.
+define void @testJ() {
+ tail call void asm sideeffect ".word $0", "J"( i32 4080 ) nounwind
+ ret void
+}
+
+; Test thumb2-mode "K" constraint, for bitwise inverted Data Processing immediates.
+define void @testK() {
+ tail call void asm sideeffect ".word $0", "K"( i32 16777215 ) nounwind
+ ret void
+}
+
+; Test thumb2-mode "L" constraint, for negated Data Processing immediates.
+define void @testL() {
+ tail call void asm sideeffect ".word $0", "L"( i32 -65280 ) nounwind
+ ret void
+}
+
+; Test thumb2-mode "M" constraint, for value between 0 and 32.
+define i32 @testM(i32 %x) {
+ %y = call i32 asm "lsl $0, $1, $2", "=r,r,M"( i32 %x, i32 31 ) nounwind
+ ret i32 %y
+}
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