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authorTim Northover <tnorthover@apple.com>2018-06-26 11:39:20 +0000
committerTim Northover <tnorthover@apple.com>2018-06-26 11:39:20 +0000
commitb73efb85bab8e77b9149174a413cc98068c73294 (patch)
treeaf0deb11acccf10fbdccb313eeb8551f0e3b4e40
parentbf5485811500e2534b17925aed80265d1b1c5af2 (diff)
downloadbcm5719-llvm-b73efb85bab8e77b9149174a413cc98068c73294.tar.gz
bcm5719-llvm-b73efb85bab8e77b9149174a413cc98068c73294.zip
ARM: correctly decode VFP instructions following unpredictable t2IT
When the condition code for an IT instruction is "AL" we get strange "15" predicates on subsequent instructions. These are dealt with for most instructions by treating them as "ARMCC::AL", but VFP takes a different path which didn't have this code. llvm-svn: 335594
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp2
-rw-r--r--llvm/test/MC/Disassembler/ARM/invalid-IT-CC15.txt12
2 files changed, 8 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index f21dce3f3ad..4733cf49827 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -659,6 +659,8 @@ ThumbDisassembler::AddThumbPredicate(MCInst &MI) const {
void ThumbDisassembler::UpdateThumbVFPPredicate(MCInst &MI) const {
unsigned CC;
CC = ITBlock.getITCC();
+ if (CC == 0xF)
+ CC = ARMCC::AL;
if (ITBlock.instrInITBlock())
ITBlock.advanceITState();
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-IT-CC15.txt b/llvm/test/MC/Disassembler/ARM/invalid-IT-CC15.txt
index 733895d6af6..2ab6f93aacb 100644
--- a/llvm/test/MC/Disassembler/ARM/invalid-IT-CC15.txt
+++ b/llvm/test/MC/Disassembler/ARM/invalid-IT-CC15.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble %s -triple=thumbv7-unknown-unknown 2>&1 | grep und
+# RUN: llvm-mc --disassemble %s -triple=thumbv7-unknown-unknown 2>&1 | FileCheck %s
# rdar://10841671
0xe3 0xbf
@@ -11,8 +11,8 @@
# above sequence of junk bytes and not allowing the disassembler to abort on
# printing the final instruction in this list.
#
-# ittte al
-# vldr d19, [pc, #388]
-# vsub.f64 d17, d17, d16
-# vadd.f64 d18, d18, d19
-# vldr<und> d16, [pc, #384]
+# CHECK: ittte al
+# CHECK: vldr d19, [pc, #388]
+# CHECK: vsub.f64 d17, d17, d16
+# CHECK: vadd.f64 d18, d18, d19
+# CHECK: vldr d16, [pc, #384]
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