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authorSanjay Patel <spatel@rotateright.com>2014-08-06 21:08:38 +0000
committerSanjay Patel <spatel@rotateright.com>2014-08-06 21:08:38 +0000
commitb63e43c93144d05ddda6aea843d94978adf9e0a9 (patch)
tree0afe1df533ba22c48b7942b1884ceff6d38efeac
parentf394f83f828628bc95db343ad7842693393f40f0 (diff)
downloadbcm5719-llvm-b63e43c93144d05ddda6aea843d94978adf9e0a9.tar.gz
bcm5719-llvm-b63e43c93144d05ddda6aea843d94978adf9e0a9.zip
fix typo
llvm-svn: 214995
-rw-r--r--llvm/lib/Target/X86/X86MCInstLower.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index cc64a5a9093..892396bc4ed 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -1006,7 +1006,7 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
SmallVector<int, 16> Mask;
assert(MI->getNumOperands() >= 6 &&
- "Wrong number of operansd for PSHUFBrm or VPSHUFBrm");
+ "Wrong number of operands for PSHUFBrm or VPSHUFBrm");
const MachineOperand &DstOp = MI->getOperand(0);
const MachineOperand &SrcOp = MI->getOperand(1);
const MachineOperand &MaskOp = MI->getOperand(5);
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