regenerate checks and remove 'opt' run dependency

llvm-svn: 278154

1 files changed, 48 insertions, 34 deletions

diff --git a/llvm/test/CodeGen/X86/select-with-and-or.ll b/llvm/test/CodeGen/X86/select-with-and-or.ll
index 40af46bc0ff..cfcb546fc16 100644
--- a/llvm/test/CodeGen/X86/select-with-and-or.ll
+++ b/llvm/test/CodeGen/X86/select-with-and-or.ll
@@ -1,72 +1,86 @@
-; RUN: opt < %s -O3 | \
-; RUN:	llc -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
 
 define <4 x i32> @test1(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
+; CHECK-LABEL: test1:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    vcmpnleps %xmm0, %xmm1, %xmm0
+; CHECK-NEXT:    vandps %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    retq
+;
   %f = fcmp ult <4 x float> %a, %b
   %r = select <4 x i1> %f, <4 x i32> %c, <4 x i32> zeroinitializer
   ret <4 x i32> %r
-; CHECK: test1
-; CHECK: cmpnle
-; CHECK-NEXT: andps
-; CHECK: ret
 }
 
 define <4 x i32> @test2(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
+; CHECK-LABEL: test2:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    vcmpnleps %xmm0, %xmm1, %xmm0
+; CHECK-NEXT:    vorps %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    retq
+;
   %f = fcmp ult <4 x float> %a, %b
   %r = select <4 x i1> %f, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %c
   ret <4 x i32> %r
-; CHECK: test2
-; CHECK: cmpnle
-; CHECK-NEXT: orps
-; CHECK: ret
 }
 
 define <4 x i32> @test3(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
+; CHECK-LABEL: test3:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    vcmpleps %xmm0, %xmm1, %xmm0
+; CHECK-NEXT:    vandps %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    retq
+;
   %f = fcmp ult <4 x float> %a, %b
   %r = select <4 x i1> %f, <4 x i32> zeroinitializer, <4 x i32> %c
   ret <4 x i32> %r
-; CHECK: test3
-; CHECK: cmple
-; CHECK-NEXT: andps
-; CHECK: ret
 }
 
 define <4 x i32> @test4(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
+; CHECK-LABEL: test4:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    vcmpleps %xmm0, %xmm1, %xmm0
+; CHECK-NEXT:    vorps %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    retq
+;
   %f = fcmp ult <4 x float> %a, %b
   %r = select <4 x i1> %f, <4 x i32> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
   ret <4 x i32> %r
-; CHECK: test4
-; CHECK: cmple
-; CHECK-NEXT: orps
-; CHECK: ret
 }
 
 define <4 x i32> @test5(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
+; CHECK-LABEL: test5:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    vcmpnleps %xmm0, %xmm1, %xmm0
+; CHECK-NEXT:    retq
+;
   %f = fcmp ult <4 x float> %a, %b
-  %r = select <4 x i1> %f, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> zeroinitializer
+  %r = sext <4 x i1> %f to <4 x i32>
   ret <4 x i32> %r
-; CHECK: test5
-; CHECK: cmpnle
-; CHECK-NEXT: ret
 }
 
 define <4 x i32> @test6(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
-  %f = fcmp ult <4 x float> %a, %b
-  %r = select <4 x i1> %f, <4 x i32> zeroinitializer, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
+; CHECK-LABEL: test6:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    vcmpleps %xmm0, %xmm1, %xmm0
+; CHECK-NEXT:    retq
+;
+  %not.f = fcmp oge <4 x float> %a, %b
+  %r = sext <4 x i1> %not.f to <4 x i32>
   ret <4 x i32> %r
-; CHECK: test6
-; CHECK: cmple
-; CHECK-NEXT: ret
 }
 
 define <4 x i32> @test7(<4 x float> %a, <4 x float> %b, <4 x i32>* %p) {
+; CHECK-LABEL: test7:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    vcmpnleps %xmm0, %xmm1, %xmm0
+; CHECK-NEXT:    vandps (%rdi), %xmm0, %xmm0
+; CHECK-NEXT:    retq
+;
   %f = fcmp ult <4 x float> %a, %b
-  %s = sext <4 x i1> %f to <4 x i32>
-  %l = load <4 x i32>, <4 x i32>* %p
-  %r = and <4 x i32> %l, %s
+  %l = load <4 x i32>, <4 x i32>* %p, align 16
+  %r = select <4 x i1> %f, <4 x i32> %l, <4 x i32> zeroinitializer
   ret <4 x i32> %r
-; CHECK: test7
-; CHECK: cmpnle
-; CHECK-NEXT: andps
-; CHECK: ret
 }
+