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author | Charlie Turner <charlie.turner@arm.com> | 2015-11-17 13:21:35 +0000 |
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committer | Charlie Turner <charlie.turner@arm.com> | 2015-11-17 13:21:35 +0000 |
commit | b4613c6973032948b6fc2d3211b33b6956657f1c (patch) | |
tree | d3978fd59593d10c93de03b1f0032ca5f205b127 | |
parent | 72a7f9c1f575b5b2ccfa52c8364b7c3a79c6949f (diff) | |
download | bcm5719-llvm-b4613c6973032948b6fc2d3211b33b6956657f1c.tar.gz bcm5719-llvm-b4613c6973032948b6fc2d3211b33b6956657f1c.zip |
[ARM] Match VABDL from log2 shuffles.
Differential Revision: http://reviews.llvm.org/D14664
llvm-svn: 253334
-rw-r--r-- | llvm/lib/Target/ARM/ARMInstrNEON.td | 23 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/neon_vabs.ll | 38 |
2 files changed, 61 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrNEON.td b/llvm/lib/Target/ARM/ARMInstrNEON.td index 5e9e3876fe3..af0552a0664 100644 --- a/llvm/lib/Target/ARM/ARMInstrNEON.td +++ b/llvm/lib/Target/ARM/ARMInstrNEON.td @@ -5009,6 +5009,29 @@ defm VABDLs : N3VLIntExt_QHS<0,1,0b0111,0, IIC_VSUBi4Q, defm VABDLu : N3VLIntExt_QHS<1,1,0b0111,0, IIC_VSUBi4Q, "vabdl", "u", uabsdiff, zext, 1>; +def abd_shr : + PatFrag<(ops node:$in1, node:$in2, node:$shift), + (NEONvshrs (sub (zext node:$in1), + (zext node:$in2)), (i32 $shift))>; + +def : Pat<(xor (v4i32 (bitconvert (v8i16 (abd_shr (v8i8 DPR:$opA), (v8i8 DPR:$opB), 15)))), + (v4i32 (bitconvert (v8i16 (add (sub (zext (v8i8 DPR:$opA)), + (zext (v8i8 DPR:$opB))), + (v8i16 (abd_shr (v8i8 DPR:$opA), (v8i8 DPR:$opB), 15))))))), + (VABDLuv8i16 DPR:$opA, DPR:$opB)>; + +def : Pat<(xor (v4i32 (abd_shr (v4i16 DPR:$opA), (v4i16 DPR:$opB), 31)), + (v4i32 (add (sub (zext (v4i16 DPR:$opA)), + (zext (v4i16 DPR:$opB))), + (abd_shr (v4i16 DPR:$opA), (v4i16 DPR:$opB), 31)))), + (VABDLuv4i32 DPR:$opA, DPR:$opB)>; + +def : Pat<(xor (v4i32 (bitconvert (v2i64 (abd_shr (v2i32 DPR:$opA), (v2i32 DPR:$opB), 63)))), + (v4i32 (bitconvert (v2i64 (add (sub (zext (v2i32 DPR:$opA)), + (zext (v2i32 DPR:$opB))), + (abd_shr (v2i32 DPR:$opA), (v2i32 DPR:$opB), 63)))))), + (VABDLuv2i64 DPR:$opA, DPR:$opB)>; + // VABA : Vector Absolute Difference and Accumulate defm VABAs : N3VIntOp_QHS<0,0,0b0111,1, IIC_VABAD, IIC_VABAQ, "vaba", "s", sabsdiff, add>; diff --git a/llvm/test/CodeGen/ARM/neon_vabs.ll b/llvm/test/CodeGen/ARM/neon_vabs.ll index 7a02512198b..d32e7b78879 100644 --- a/llvm/test/CodeGen/ARM/neon_vabs.ll +++ b/llvm/test/CodeGen/ARM/neon_vabs.ll @@ -89,3 +89,41 @@ define <2 x i32> @test10(<2 x i32> %a) nounwind { %abs = select <2 x i1> %b, <2 x i32> %tmp1neg, <2 x i32> %a ret <2 x i32> %abs } + +;; Check that absdiff patterns as emitted by log2 shuffles are +;; matched by VABD. + +define <4 x i32> @test11(<4 x i16> %a, <4 x i16> %b) nounwind { +; CHECK-LABEL: test11: +; CHECK: vabdl.u16 q + %zext1 = zext <4 x i16> %a to <4 x i32> + %zext2 = zext <4 x i16> %b to <4 x i32> + %diff = sub <4 x i32> %zext1, %zext2 + %shift1 = ashr <4 x i32> %diff, <i32 31, i32 31, i32 31, i32 31> + %add1 = add <4 x i32> %shift1, %diff + %res = xor <4 x i32> %shift1, %add1 + ret <4 x i32> %res +} +define <8 x i16> @test12(<8 x i8> %a, <8 x i8> %b) nounwind { +; CHECK-LABEL: test12: +; CHECK: vabdl.u8 q + %zext1 = zext <8 x i8> %a to <8 x i16> + %zext2 = zext <8 x i8> %b to <8 x i16> + %diff = sub <8 x i16> %zext1, %zext2 + %shift1 = ashr <8 x i16> %diff,<i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15> + %add1 = add <8 x i16> %shift1, %diff + %res = xor <8 x i16> %shift1, %add1 + ret <8 x i16> %res +} + +define <2 x i64> @test13(<2 x i32> %a, <2 x i32> %b) nounwind { +; CHECK-LABEL: test13: +; CHECK: vabdl.u32 q + %zext1 = zext <2 x i32> %a to <2 x i64> + %zext2 = zext <2 x i32> %b to <2 x i64> + %diff = sub <2 x i64> %zext1, %zext2 + %shift1 = ashr <2 x i64> %diff,<i64 63, i64 63> + %add1 = add <2 x i64> %shift1, %diff + %res = xor <2 x i64> %shift1, %add1 + ret <2 x i64> %res +} |