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author | Ivan A. Kosarev <ikosarev@accesssoftek.com> | 2018-04-17 16:43:07 +0000 |
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committer | Ivan A. Kosarev <ikosarev@accesssoftek.com> | 2018-04-17 16:43:07 +0000 |
commit | b3b87c3314d6ea5e1ba0104deede929dcf544f62 (patch) | |
tree | 37c9b414c28b6f6f691d34606d0753578c41ebda | |
parent | 9e4321c12d6a097742419ea4e2c458e1f21734bf (diff) | |
download | bcm5719-llvm-b3b87c3314d6ea5e1ba0104deede929dcf544f62.tar.gz bcm5719-llvm-b3b87c3314d6ea5e1ba0104deede929dcf544f62.zip |
[NEON] Define vget_high_f16() and vget_low_f16() intrinsics in AArch64 mode only
Differential Revision: https://reviews.llvm.org/D45668
llvm-svn: 330195
-rw-r--r-- | clang/include/clang/Basic/arm_neon.td | 10 | ||||
-rw-r--r-- | clang/test/CodeGen/arm_neon_intrinsics.c | 14 |
2 files changed, 8 insertions, 16 deletions
diff --git a/clang/include/clang/Basic/arm_neon.td b/clang/include/clang/Basic/arm_neon.td index 0e3be38586f..4c8809a5916 100644 --- a/clang/include/clang/Basic/arm_neon.td +++ b/clang/include/clang/Basic/arm_neon.td @@ -398,8 +398,14 @@ def VCOMBINE : NoTestOpInst<"vcombine", "kdd", "csilhfUcUsUiUlPcPs", OP_CONC>; //////////////////////////////////////////////////////////////////////////////// // E.3.21 Splitting vectors let InstName = "vmov" in { -def VGET_HIGH : NoTestOpInst<"vget_high", "dk", "csilhfUcUsUiUlPcPs", OP_HI>; -def VGET_LOW : NoTestOpInst<"vget_low", "dk", "csilhfUcUsUiUlPcPs", OP_LO>; +def VGET_HIGH : NoTestOpInst<"vget_high", "dk", "csilfUcUsUiUlPcPs", OP_HI>; +def VGET_LOW : NoTestOpInst<"vget_low", "dk", "csilfUcUsUiUlPcPs", OP_LO>; +} +let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__)" in { + let InstName = "vmov" in { + def VGET_HIGH_F16 : NoTestOpInst<"vget_high", "dk", "h", OP_HI>; + def VGET_LOW_F16 : NoTestOpInst<"vget_low", "dk", "h", OP_LO>; + } } //////////////////////////////////////////////////////////////////////////////// diff --git a/clang/test/CodeGen/arm_neon_intrinsics.c b/clang/test/CodeGen/arm_neon_intrinsics.c index 95ac3dca7a8..1247ce28842 100644 --- a/clang/test/CodeGen/arm_neon_intrinsics.c +++ b/clang/test/CodeGen/arm_neon_intrinsics.c @@ -3254,13 +3254,6 @@ int64x1_t test_vget_high_s64(int64x2_t a) { return vget_high_s64(a); } -// CHECK-LABEL: @test_vget_high_f16( -// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7> -// CHECK: ret <4 x half> [[SHUFFLE_I]] -float16x4_t test_vget_high_f16(float16x8_t a) { - return vget_high_f16(a); -} - // CHECK-LABEL: @test_vget_high_f32( // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 2, i32 3> // CHECK: ret <2 x float> [[SHUFFLE_I]] @@ -3560,13 +3553,6 @@ int64x1_t test_vget_low_s64(int64x2_t a) { return vget_low_s64(a); } -// CHECK-LABEL: @test_vget_low_f16( -// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3> -// CHECK: ret <4 x half> [[SHUFFLE_I]] -float16x4_t test_vget_low_f16(float16x8_t a) { - return vget_low_f16(a); -} - // CHECK-LABEL: @test_vget_low_f32( // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1> // CHECK: ret <2 x float> [[SHUFFLE_I]] |