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author | Tom Stellard <thomas.stellard@amd.com> | 2016-06-25 01:59:16 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2016-06-25 01:59:16 +0000 |
commit | b164a9843bedf4edf6c27c8f575c05933efddca4 (patch) | |
tree | 8c50b8276db1701fb7d19fa59b4520a9288abd14 | |
parent | f63768cbfcebb0b5496f4a8366f3378149af74f2 (diff) | |
download | bcm5719-llvm-b164a9843bedf4edf6c27c8f575c05933efddca4.tar.gz bcm5719-llvm-b164a9843bedf4edf6c27c8f575c05933efddca4.zip |
AMDGPU/SI: Make sure not to fold offsets into local address space globals
Summary:
Offset folding only works if you are emitting relocations, and we don't
emit relocations for local address space globals.
Reviewers: arsenm, nhaustov
Subscribers: arsenm, llvm-commits, kzhuravl
Differential Revision: http://reviews.llvm.org/D21647
llvm-svn: 273765
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 8 | ||||
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/gv-offset-folding.ll | 21 |
3 files changed, 31 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 60fe8c8bf54..3142e4c8f42 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -1422,6 +1422,14 @@ SDValue SITargetLowering::lowerADDRSPACECAST(SDValue Op, return DAG.getUNDEF(ASC->getValueType(0)); } +bool +SITargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const { + if (GA->getAddressSpace() != AMDGPUAS::GLOBAL_ADDRESS) + return false; + + return TargetLowering::isOffsetFoldingLegal(GA); +} + SDValue SITargetLowering::LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op, SelectionDAG &DAG) const { diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h index 2f013198970..032372b7b17 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.h +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h @@ -105,6 +105,8 @@ public: bool isTypeDesirableForOp(unsigned Op, EVT VT) const override; + bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override; + SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, diff --git a/llvm/test/CodeGen/AMDGPU/gv-offset-folding.ll b/llvm/test/CodeGen/AMDGPU/gv-offset-folding.ll new file mode 100644 index 00000000000..c75fdb35dd0 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/gv-offset-folding.ll @@ -0,0 +1,21 @@ +; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -relocation-model=static < %s | FileCheck %s + +@lds = external addrspace(3) global [4 x i32] + +; Function Attrs: nounwind + +; Offset folding is an optimization done for global variables with relocations, +; which allows you to store the offset in the r_addend of the relocation entry. +; The offset is apllied to the variables address at link time, which eliminates +; the need to emit shader instructions to do this calculation. +; We don't use relocations for local memory, so we should never fold offsets +; for local memory globals. + +; CHECK-LABEL: lds_no_offset: +; CHECK ds_write_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:4 +define void @lds_no_offset() { +entry: + %ptr = getelementptr [4 x i32], [4 x i32] addrspace(3)* @lds, i32 0, i32 1 + store i32 0, i32 addrspace(3)* %ptr + ret void +} |