summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChad Rosier <mcrosier@apple.com>2013-03-19 23:44:03 +0000
committerChad Rosier <mcrosier@apple.com>2013-03-19 23:44:03 +0000
commitb162a5ca4d706fd22951bc7d9bedb6911d519f05 (patch)
tree9df61da79291119e5f1a2d019b85a3deabe78999
parentabec74b38e86760c2ca4598ffd8f062a0b24731f (diff)
downloadbcm5719-llvm-b162a5ca4d706fd22951bc7d9bedb6911d519f05.tar.gz
bcm5719-llvm-b162a5ca4d706fd22951bc7d9bedb6911d519f05.zip
Fix pr13145 - Naming a function like a register name confuses the asm parser.
Patch by Stepan Dyatkovskiy <stpworld@narod.ru> rdar://13457826 llvm-svn: 177463
-rw-r--r--llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp34
-rw-r--r--llvm/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s5
2 files changed, 25 insertions, 14 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index c897efd0198..ed7b7ec9d2c 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -4593,20 +4593,26 @@ bool ARMAsmParser::parseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
Error(Parser.getTok().getLoc(), "unexpected token in operand");
return true;
case AsmToken::Identifier: {
- if (!tryParseRegisterWithWriteBack(Operands))
- return false;
- int Res = tryParseShiftRegister(Operands);
- if (Res == 0) // success
- return false;
- else if (Res == -1) // irrecoverable error
- return true;
- // If this is VMRS, check for the apsr_nzcv operand.
- if (Mnemonic == "vmrs" &&
- Parser.getTok().getString().equals_lower("apsr_nzcv")) {
- S = Parser.getTok().getLoc();
- Parser.Lex();
- Operands.push_back(ARMOperand::CreateToken("APSR_nzcv", S));
- return false;
+ // If we've seen a branch mnemonic, the next operand must be a label. This
+ // is true even if the label is a register name. So "br r1" means branch to
+ // label "r1".
+ bool ExpectLabel = Mnemonic == "b" || Mnemonic == "bl";
+ if (!ExpectLabel) {
+ if (!tryParseRegisterWithWriteBack(Operands))
+ return false;
+ int Res = tryParseShiftRegister(Operands);
+ if (Res == 0) // success
+ return false;
+ else if (Res == -1) // irrecoverable error
+ return true;
+ // If this is VMRS, check for the apsr_nzcv operand.
+ if (Mnemonic == "vmrs" &&
+ Parser.getTok().getString().equals_lower("apsr_nzcv")) {
+ S = Parser.getTok().getLoc();
+ Parser.Lex();
+ Operands.push_back(ARMOperand::CreateToken("APSR_nzcv", S));
+ return false;
+ }
}
// Fall though for the Identifier case that is not a register or a
diff --git a/llvm/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s b/llvm/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s
new file mode 100644
index 00000000000..172abcf6f81
--- /dev/null
+++ b/llvm/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s
@@ -0,0 +1,5 @@
+@ RUN: llvm-mc -arch arm %s
+@ CHECK: test:
+@ CHECK: br r1
+test:
+ bl r1
OpenPOWER on IntegriCloud