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| author | Craig Topper <craig.topper@gmail.com> | 2013-07-22 10:07:26 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2013-07-22 10:07:26 +0000 |
| commit | b095c093305ecca7822c6d03d1632365e7068946 (patch) | |
| tree | e54e707a6d6a744288f0d6af121060519c5e15c7 | |
| parent | 61da939a17e693e01e886a0907368a23978e5738 (diff) | |
| download | bcm5719-llvm-b095c093305ecca7822c6d03d1632365e7068946.tar.gz bcm5719-llvm-b095c093305ecca7822c6d03d1632365e7068946.zip | |
Fix typo. Change %cl to CL in Intel pattern.
llvm-svn: 186815
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrShiftRotate.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrShiftRotate.td b/llvm/lib/Target/X86/X86InstrShiftRotate.td index 89c1a689139..59aa946296e 100644 --- a/llvm/lib/Target/X86/X86InstrShiftRotate.td +++ b/llvm/lib/Target/X86/X86InstrShiftRotate.td @@ -537,7 +537,7 @@ def ROL32mCL : I<0xD3, MRM0m, (outs), (ins i32mem:$dst), [(store (rotl (loadi32 addr:$dst), CL), addr:$dst)], IIC_SR>; def ROL64mCL : RI<0xD3, MRM0m, (outs), (ins i64mem:$dst), - "rol{q}\t{%cl, $dst|$dst, %cl}", + "rol{q}\t{%cl, $dst|$dst, CL}", [(store (rotl (loadi64 addr:$dst), CL), addr:$dst)], IIC_SR>; } |
