[x86][inline-asm] allow recognition of MPX regs inside ms inline-asm blob

Differential Revision: https://reviews.llvm.org/D38445

llvm-svn: 318739

2 files changed, 12 insertions, 0 deletions

diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index ca32c16b3aa..0ad1c9bf314 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -60,6 +60,7 @@ static const char *const GCCRegNames[] = {
     "k2",    "k3",    "k4",    "k5",    "k6",      "k7",
     "cr0",   "cr2",   "cr3",   "cr4",   "cr8",
     "dr0",   "dr1",   "dr2",   "dr3",   "dr6",     "dr7",
+    "bnd0",  "bnd1",  "bnd2",  "bnd3",
 };
 
 const TargetInfo::AddlRegName AddlRegNames[] = {
diff --git a/clang/test/CodeGen/ms-inline-asm.c b/clang/test/CodeGen/ms-inline-asm.c
index c03f0deb056..cc8453b8681 100644
--- a/clang/test/CodeGen/ms-inline-asm.c
+++ b/clang/test/CodeGen/ms-inline-asm.c
@@ -661,6 +661,17 @@ void t46() {
   // CHECK: call void asm sideeffect inteldialect "add eax, [eax + $$-128]", "~{eax},~{flags},~{dirflag},~{fpsr},~{flags}"()
 }
 
+void t47() {
+  // CHECK-LABEL: define void @t47
+  __asm {
+    bndmk bnd0, dword ptr [eax]
+    bndmk bnd1, dword ptr [ebx]
+    bndmk bnd2, dword ptr [ecx]
+    bndmk bnd3, dword ptr [edx]
+  }
+  // CHECK: call void asm sideeffect inteldialect "bndmk bnd0, dword ptr [eax]\0A\09bndmk bnd1, dword ptr [ebx]\0A\09bndmk bnd2, dword ptr [ecx]\0A\09bndmk bnd3, dword ptr [edx]", "~{bnd0},~{bnd1},~{bnd2},~{bnd3},~{dirflag},~{fpsr},~{flags}"()
+}
+
 void dot_operator(){
   // CHECK-LABEL: define void @dot_operator
 	__asm { mov eax, 3[ebx]A.b}