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author | Duncan Sands <baldrick@free.fr> | 2012-02-05 14:20:11 +0000 |
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committer | Duncan Sands <baldrick@free.fr> | 2012-02-05 14:20:11 +0000 |
commit | ae22c60f9024fc217227935d10d4dec155ccb7b2 (patch) | |
tree | 8ab0615a90f19456cb397a6f83c3756f86a3a50b | |
parent | efabc2572f141b822f8b4e3bbd7a198a02ee7ccb (diff) | |
download | bcm5719-llvm-ae22c60f9024fc217227935d10d4dec155ccb7b2.tar.gz bcm5719-llvm-ae22c60f9024fc217227935d10d4dec155ccb7b2.zip |
Persuade GCC that there is nothing worth warning about here (there isn't).
llvm-svn: 149834
-rw-r--r-- | llvm/lib/Analysis/AliasAnalysisCounter.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/CodeGen/MachineCSE.cpp | 1 | ||||
-rw-r--r-- | llvm/lib/Support/Mutex.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMFastISel.cpp | 1 | ||||
-rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c | 2 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
6 files changed, 7 insertions, 5 deletions
diff --git a/llvm/lib/Analysis/AliasAnalysisCounter.cpp b/llvm/lib/Analysis/AliasAnalysisCounter.cpp index a7744c9b2db..9f219f56373 100644 --- a/llvm/lib/Analysis/AliasAnalysisCounter.cpp +++ b/llvm/lib/Analysis/AliasAnalysisCounter.cpp @@ -127,7 +127,7 @@ AliasAnalysis::AliasResult AliasAnalysisCounter::alias(const Location &LocA, const Location &LocB) { AliasResult R = getAnalysis<AliasAnalysis>().alias(LocA, LocB); - const char *AliasString; + const char *AliasString = 0; switch (R) { case NoAlias: No++; AliasString = "No alias"; break; case MayAlias: May++; AliasString = "May alias"; break; @@ -153,7 +153,7 @@ AliasAnalysisCounter::getModRefInfo(ImmutableCallSite CS, const Location &Loc) { ModRefResult R = getAnalysis<AliasAnalysis>().getModRefInfo(CS, Loc); - const char *MRString; + const char *MRString = 0; switch (R) { case NoModRef: NoMR++; MRString = "NoModRef"; break; case Ref: JustRef++; MRString = "JustRef"; break; diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp index 0715f28ca13..9d46aaab8df 100644 --- a/llvm/lib/CodeGen/MachineCSE.cpp +++ b/llvm/lib/CodeGen/MachineCSE.cpp @@ -255,6 +255,7 @@ bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI, if (I == EE) { assert(CrossMBB && "Reaching end-of-MBB without finding MI?"); + (void)CrossMBB; CrossMBB = false; NonLocal = true; I = MBB->begin(); diff --git a/llvm/lib/Support/Mutex.cpp b/llvm/lib/Support/Mutex.cpp index e146b8b0ed1..da5baab4be4 100644 --- a/llvm/lib/Support/Mutex.cpp +++ b/llvm/lib/Support/Mutex.cpp @@ -51,7 +51,7 @@ MutexImpl::MutexImpl( bool recursive) // Initialize the mutex attributes int errorcode = pthread_mutexattr_init(&attr); - assert(errorcode == 0); + assert(errorcode == 0); (void)errorcode; // Initialize the mutex as a recursive mutex, if requested, or normal // otherwise. diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp index 63c516109e3..79c447af2c6 100644 --- a/llvm/lib/Target/ARM/ARMFastISel.cpp +++ b/llvm/lib/Target/ARM/ARMFastISel.cpp @@ -2279,6 +2279,7 @@ bool ARMFastISel::ARMTryEmitSmallMemCpy(Address Dest, Address Src, uint64_t Len) assert (RV == true && "Should be able to handle this load."); RV = ARMEmitStore(VT, ResultReg, Dest); assert (RV == true && "Should be able to handle this store."); + (void)RV; unsigned Size = VT.getSizeInBits()/8; Len -= Size; diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c index bb24d331317..958f653eb73 100644 --- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c +++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c @@ -103,7 +103,7 @@ static InstrUID decode(OpcodeType type, InstructionContext insnContext, uint8_t opcode, uint8_t modRM) { - const struct ModRMDecision* dec; + const struct ModRMDecision* dec = 0; switch (type) { case ONEBYTE: diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 7c3faca1db7..81396cca2e6 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -8288,7 +8288,7 @@ SDValue X86TargetLowering::LowerVSETCC(SDValue Op, SelectionDAG &DAG) const { if (isFP) { unsigned SSECC = 8; EVT EltVT = Op0.getValueType().getVectorElementType(); - assert(EltVT == MVT::f32 || EltVT == MVT::f64); + assert(EltVT == MVT::f32 || EltVT == MVT::f64); (void)EltVT; bool Swap = false; |