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| author | Stuart Hastings <stuart@apple.com> | 2011-05-19 05:53:22 +0000 |
|---|---|---|
| committer | Stuart Hastings <stuart@apple.com> | 2011-05-19 05:53:22 +0000 |
| commit | ae012a7525a6d9e833299e2011b34c58cfe07911 (patch) | |
| tree | 17365f06f5a8f33d0ebf54d0fcdd961c8190fad0 | |
| parent | 4a2570792c75fad45e9d891999207e054e17312f (diff) | |
| download | bcm5719-llvm-ae012a7525a6d9e833299e2011b34c58cfe07911.tar.gz bcm5719-llvm-ae012a7525a6d9e833299e2011b34c58cfe07911.zip | |
Move test to Transforms/InstCombine.
llvm-svn: 131634
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_shuffle-36.ll | 19 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/vec_demanded_elts.ll | 16 |
2 files changed, 16 insertions, 19 deletions
diff --git a/llvm/test/CodeGen/X86/vec_shuffle-36.ll b/llvm/test/CodeGen/X86/vec_shuffle-36.ll index 89dc2935a17..8090afc7434 100644 --- a/llvm/test/CodeGen/X86/vec_shuffle-36.ll +++ b/llvm/test/CodeGen/X86/vec_shuffle-36.ll @@ -1,5 +1,4 @@ ; RUN: llc < %s -march=x86-64 -mattr=sse41 | FileCheck %s -; RUN: opt -std-compile-opts < %s | llc -march=x86-64 -mattr=sse41 | FileCheck --check-prefix=CHECK_OPT_LLC %s define <8 x i16> @shuf6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { ; CHECK: pshufb @@ -15,21 +14,3 @@ define <8 x i16> @shuf7(<8 x i16> %t0) { %tmp10 = shufflevector <8 x i16> %t0, <8 x i16> undef, <8 x i32> < i32 undef, i32 2, i32 2, i32 2, i32 2, i32 2, i32 undef, i32 undef > ret <8 x i16> %tmp10 } - - -; <rdar://problem/6945110> -define <4 x i32> @kernel3_vertical(<4 x i16> * %src, <8 x i16> * %foo) nounwind { -entry: -; CHECK_OPT_LLC: call{{.*nothing}} - call void @nothing() - %tmp = load <4 x i16>* %src - %tmp1 = load <8 x i16>* %foo -; pmovzxwd ignores the upper 64-bits of its input; everything between the call and pmovzxwd should be removed. - %tmp2 = shufflevector <4 x i16> %tmp, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef> - %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7> -; CHECK_OPT_LLC-NEXT: pmovzxwd - %0 = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp3) - ret <4 x i32> %0 -} -declare void @nothing() nounwind -declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone diff --git a/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll b/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll index 9f308aa093e..e0188fe91ae 100644 --- a/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll +++ b/llvm/test/Transforms/InstCombine/vec_demanded_elts.ll @@ -136,3 +136,19 @@ declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) + +; <rdar://problem/6945110> +define <4 x i32> @kernel3_vertical(<4 x i16> * %src, <8 x i16> * %foo) nounwind { +entry: + %tmp = load <4 x i16>* %src + %tmp1 = load <8 x i16>* %foo +; CHECK: %tmp2 = shufflevector + %tmp2 = shufflevector <4 x i16> %tmp, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef> +; pmovzxwd ignores the upper 64-bits of its input; -instcombine should remove this shuffle: +; CHECK-NOT: shufflevector + %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7> +; CHECK-NEXT: pmovzxwd + %0 = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp3) + ret <4 x i32> %0 +} +declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone |
