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authorTom Stellard <thomas.stellard@amd.com>2016-01-08 14:50:23 +0000
committerTom Stellard <thomas.stellard@amd.com>2016-01-08 14:50:23 +0000
commitad8f5e8111801382a84580caf82be68c429e07a2 (patch)
tree8822474acf89a7f782481f4818c1658fcb7dc7ba
parenta1080ee6f0a2e80a911b1a3c5215b584669fcd87 (diff)
downloadbcm5719-llvm-ad8f5e8111801382a84580caf82be68c429e07a2.tar.gz
bcm5719-llvm-ad8f5e8111801382a84580caf82be68c429e07a2.zip
AMDGPU: Emit functions sizes
Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15951 llvm-svn: 257172
-rw-r--r--llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp1
-rw-r--r--llvm/test/CodeGen/AMDGPU/hsa.ll4
2 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
index 68b1d1ae83c..4bc80a02893 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
@@ -28,7 +28,6 @@ AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT) : MCAsmInfoELF() {
//===--- Global Variable Emission Directives --------------------------===//
HasAggressiveSymbolFolding = true;
COMMDirectiveAlignmentIsInBytes = false;
- HasDotTypeDotSizeDirective = false;
HasNoDeadStrip = true;
WeakRefDirective = ".weakref\t";
//===--- Dwarf Emission Directives -----------------------------------===//
diff --git a/llvm/test/CodeGen/AMDGPU/hsa.ll b/llvm/test/CodeGen/AMDGPU/hsa.ll
index abc89b7fd83..c089dfd9a97 100644
--- a/llvm/test/CodeGen/AMDGPU/hsa.ll
+++ b/llvm/test/CodeGen/AMDGPU/hsa.ll
@@ -28,6 +28,7 @@
; ELF: Symbol {
; ELF: Name: simple
+; ELF: Size: 296
; ELF: Type: AMDGPU_HSA_KERNEL (0xA)
; ELF: }
@@ -52,6 +53,9 @@
; Make sure we generate flat store for HSA
; HSA: flat_store_dword v{{[0-9]+}}
+; HSA: .Lfunc_end0:
+; HSA: .size simple, .Lfunc_end0-simple
+
define void @simple(i32 addrspace(1)* %out) {
entry:
store i32 0, i32 addrspace(1)* %out
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