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| author | Nadav Rotem <nrotem@apple.com> | 2012-12-07 21:43:11 +0000 |
|---|---|---|
| committer | Nadav Rotem <nrotem@apple.com> | 2012-12-07 21:43:11 +0000 |
| commit | ad0b5fbe8c60b46de44f5f484cfb0995ef333423 (patch) | |
| tree | 3867dc41ca2480c9a5ab6bd96a202ea8eca203ba | |
| parent | e76c1e5aec61970f688a0ae8611b2041b5e10fd8 (diff) | |
| download | bcm5719-llvm-ad0b5fbe8c60b46de44f5f484cfb0995ef333423.tar.gz bcm5719-llvm-ad0b5fbe8c60b46de44f5f484cfb0995ef333423.zip | |
When we use the BLEND instruction that uses the MSB as a mask, we can remove
the VSRI instruction before it since it does not affect the MSB.
Thanks Craig Topper for suggesting this.
llvm-svn: 169638
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/blend-msb.ll | 2 |
3 files changed, 8 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index d48d722fabf..8f7f38d0122 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -15675,6 +15675,11 @@ static SDValue PerformOrCombine(SDNode *N, SelectionDAG &DAG, DebugLoc DL = N->getDebugLoc(); + // We are going to replace the AND, OR, NAND with either BLEND + // or PSIGN, which only look at the MSB. The VSRAI instruction + // does not affect the highest bit, so we can get rid of it. + Mask = Mask.getOperand(0); + // Now we know we at least have a plendvb with the mask val. See if // we can form a psignb/w/d. // psign = x.type == y.type == mask.type && y = sub(0, x); @@ -15683,7 +15688,7 @@ static SDValue PerformOrCombine(SDNode *N, SelectionDAG &DAG, X.getValueType() == MaskVT && Y.getValueType() == MaskVT) { assert((EltBits == 8 || EltBits == 16 || EltBits == 32) && "Unsupported VT for PSIGN"); - Mask = DAG.getNode(X86ISD::PSIGN, DL, MaskVT, X, Mask.getOperand(0)); + Mask = DAG.getNode(X86ISD::PSIGN, DL, MaskVT, X, Mask); return DAG.getNode(ISD::BITCAST, DL, VT, Mask); } // PBLENDVB only available on SSE 4.1 diff --git a/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll b/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll index dbc122ac6e4..1a9d46d1e25 100644 --- a/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll +++ b/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll @@ -5,7 +5,7 @@ target triple = "x86_64-apple-darwin11.2.0" ; CHECK: @foo8 ; CHECK: psll -; CHECK: psraw +; CHECK-NOT: psraw ; CHECK: pblendvb ; CHECK: ret define void @foo8(float* nocapture %RET) nounwind { diff --git a/llvm/test/CodeGen/X86/blend-msb.ll b/llvm/test/CodeGen/X86/blend-msb.ll index 11f811f8cf6..34445428ea2 100644 --- a/llvm/test/CodeGen/X86/blend-msb.ll +++ b/llvm/test/CodeGen/X86/blend-msb.ll @@ -28,7 +28,7 @@ define <4 x i8> @vsel_4xi8(<4 x i8> %v1, <4 x i8> %v2) { ; reduce the mask in this case. ;CHECK: vsel_8xi16 ;CHECK: psllw -;CHECK: psraw +;CHECK-NOT: psraw ;CHECK: pblendvb ;CHECK: ret define <8 x i16> @vsel_8xi16(<8 x i16> %v1, <8 x i16> %v2) { |
