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| author | Craig Topper <craig.topper@intel.com> | 2018-01-26 19:34:45 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-26 19:34:45 +0000 |
| commit | ace5c37c5728ab5984d2837becd3d22d9ee4a7c4 (patch) | |
| tree | a552bc0e6298d6d3218644a90bfa6182522a1761 | |
| parent | 8f324bb1a42309001748977068c84dfcd6029896 (diff) | |
| download | bcm5719-llvm-ace5c37c5728ab5984d2837becd3d22d9ee4a7c4.tar.gz bcm5719-llvm-ace5c37c5728ab5984d2837becd3d22d9ee4a7c4.zip | |
[X86] Add 'rdrnd' feature to silvermont to match recent gcc bug fix.
gcc recently fixed this bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83546
llvm-svn: 323552
| -rw-r--r-- | clang/lib/Basic/Targets/X86.cpp | 2 | ||||
| -rw-r--r-- | clang/test/Preprocessor/predefined-arch-macros.c | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index eae158f0d5f..484a83a494e 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -239,7 +239,6 @@ bool X86TargetInfo::initFeatureMap( case CK_Goldmont: setFeatureEnabledImpl(Features, "sha", true); - setFeatureEnabledImpl(Features, "rdrnd", true); setFeatureEnabledImpl(Features, "rdseed", true); setFeatureEnabledImpl(Features, "xsave", true); setFeatureEnabledImpl(Features, "xsaveopt", true); @@ -250,6 +249,7 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "fsgsbase", true); LLVM_FALLTHROUGH; case CK_Silvermont: + setFeatureEnabledImpl(Features, "rdrnd", true); setFeatureEnabledImpl(Features, "aes", true); setFeatureEnabledImpl(Features, "pclmul", true); setFeatureEnabledImpl(Features, "sse4.2", true); diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c index bf981076a18..ef0c022ac0e 100644 --- a/clang/test/Preprocessor/predefined-arch-macros.c +++ b/clang/test/Preprocessor/predefined-arch-macros.c @@ -1272,6 +1272,7 @@ // CHECK_SLM_M32: #define __PCLMUL__ 1 // CHECK_SLM_M32: #define __POPCNT__ 1 // CHECK_SLM_M32: #define __PRFCHW__ 1 +// CHECK_SLM_M32: #define __RDRND__ 1 // CHECK_SLM_M32: #define __SSE2__ 1 // CHECK_SLM_M32: #define __SSE3__ 1 // CHECK_SLM_M32: #define __SSE4_1__ 1 @@ -1293,6 +1294,7 @@ // CHECK_SLM_M64: #define __PCLMUL__ 1 // CHECK_SLM_M64: #define __POPCNT__ 1 // CHECK_SLM_M64: #define __PRFCHW__ 1 +// CHECK_SLM_M64: #define __RDRND__ 1 // CHECK_SLM_M64: #define __SSE2_MATH__ 1 // CHECK_SLM_M64: #define __SSE2__ 1 // CHECK_SLM_M64: #define __SSE3__ 1 |
