diff options
| author | Simon Tatham <simon.tatham@arm.com> | 2019-11-28 15:31:41 +0000 |
|---|---|---|
| committer | Simon Tatham <simon.tatham@arm.com> | 2019-11-28 15:31:59 +0000 |
| commit | acd7fe8636ab1d892a935ca747ed9bb6420e2253 (patch) | |
| tree | 82e77cee38d390027eb518fffbbbb559675c9fd1 | |
| parent | ed864745c97ece86e29957cb94b5a3e8dee86859 (diff) | |
| download | bcm5719-llvm-acd7fe8636ab1d892a935ca747ed9bb6420e2253.tar.gz bcm5719-llvm-acd7fe8636ab1d892a935ca747ed9bb6420e2253.zip | |
[AArch64][v8.3a] Don't emit LDRA '[xN]!' alias in disassembly.
Summary:
In rG643ac6c0420b, the syntax `ldraa x1, [x0]!` was added as an alias
for `ldraa x1, [x0, #0]!`. That syntax is less obvious in meaning, and
also will not be accepted by assemblers that haven't been updated yet.
So it would be better not to emit it as the preferred disassembly for
that instruction.
This change lowers the EmitPriority of the new alias so that the more
explicit syntax `[x0, #0]!` is preferred by the disassembler. The new
syntax is still accepted by the assembler.
Reviewers: ab, ostannard
Reviewed By: ostannard
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70813
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrFormats.td | 2 | ||||
| -rw-r--r-- | llvm/test/MC/AArch64/armv8.3a-signed-pointer.s | 4 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td index 5da790c8461..878cb79eb32 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td +++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td @@ -1473,7 +1473,7 @@ multiclass AuthLoad<bit M, string asm, Operand opr> { (!cast<Instruction>(NAME # "indexed") GPR64:$Rt, GPR64sp:$Rn, 0)>; def : InstAlias<asm # "\t$Rt, [$wback]!", - (!cast<Instruction>(NAME # "writeback") GPR64sp:$wback, GPR64:$Rt, 0)>; + (!cast<Instruction>(NAME # "writeback") GPR64sp:$wback, GPR64:$Rt, 0), 0>; } //--- diff --git a/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s b/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s index 2ca15fceccc..056a3ae86c0 100644 --- a/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s +++ b/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s @@ -307,10 +307,10 @@ // CHECK-REQ: error: instruction requires: pa // CHECK-REQ-NEXT: ldrab x0, [x1] ldraa x0, [x1]! -// CHECK-NEXT: ldraa x0, [x1]! // encoding: [0x20,0x0c,0x20,0xf8] +// CHECK-NEXT: ldraa x0, [x1, #0]! // encoding: [0x20,0x0c,0x20,0xf8] // CHECK-REQ: error: instruction requires: pa // CHECK-REQ-NEXT: ldraa x0, [x1]! ldrab x0, [x1]! -// CHECK-NEXT: ldrab x0, [x1]! // encoding: [0x20,0x0c,0xa0,0xf8] +// CHECK-NEXT: ldrab x0, [x1, #0]! // encoding: [0x20,0x0c,0xa0,0xf8] // CHECK-REQ: error: instruction requires: pa // CHECK-REQ-NEXT: ldrab x0, [x1]! diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt b/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt index d11056044fa..7215d086c69 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt @@ -114,7 +114,7 @@ [0x20,0x04,0x20,0xf8] [0x20,0x04,0xa0,0xf8] -# CHECK: ldraa x0, [x1]! -# CHECK: ldrab x0, [x1]! +# CHECK: ldraa x0, [x1, #0]! +# CHECK: ldrab x0, [x1, #0]! [0x20,0x0c,0x20,0xf8] [0x20,0x0c,0xa0,0xf8] |
