summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorYaxun Liu <Yaxun.Liu@amd.com>2018-03-23 19:43:42 +0000
committerYaxun Liu <Yaxun.Liu@amd.com>2018-03-23 19:43:42 +0000
commitac1263cd54ffaa50d692e1d99c34f16759126cae (patch)
treeb272bd8d99b17605a6cb809985c9b9edbf1f3eaa
parentdf5d9486aa4e044b0d7954689fa578fae02e06a0 (diff)
downloadbcm5719-llvm-ac1263cd54ffaa50d692e1d99c34f16759126cae.tar.gz
bcm5719-llvm-ac1263cd54ffaa50d692e1d99c34f16759126cae.zip
[AMDGPU] Fix codegen for inline assembly
Need to override convertConstraint to recognise amdgpu specific register names. Differential Revision: https://reviews.llvm.org/D44533 llvm-svn: 328359
-rw-r--r--clang/lib/Basic/Targets/AMDGPU.h13
-rw-r--r--clang/lib/CodeGen/CGStmt.cpp2
-rw-r--r--clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl8
-rw-r--r--clang/test/Sema/inline-asm-validate-amdgpu.cl5
4 files changed, 27 insertions, 1 deletions
diff --git a/clang/lib/Basic/Targets/AMDGPU.h b/clang/lib/Basic/Targets/AMDGPU.h
index 603c9b2d546..f7c477659dc 100644
--- a/clang/lib/Basic/Targets/AMDGPU.h
+++ b/clang/lib/Basic/Targets/AMDGPU.h
@@ -285,6 +285,19 @@ public:
return true;
}
+ // \p Constraint will be left pointing at the last character of
+ // the constraint. In practice, it won't be changed unless the
+ // constraint is longer than one character.
+ std::string convertConstraint(const char *&Constraint) const override {
+ const char *Begin = Constraint;
+ TargetInfo::ConstraintInfo Info("", "");
+ if (validateAsmConstraint(Constraint, Info))
+ return std::string(Begin).substr(0, Constraint - Begin + 1);
+
+ Constraint = Begin;
+ return std::string(1, *Constraint);
+ }
+
bool
initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
StringRef CPU,
diff --git a/clang/lib/CodeGen/CGStmt.cpp b/clang/lib/CodeGen/CGStmt.cpp
index b1d1bf874dd..b89d9f09298 100644
--- a/clang/lib/CodeGen/CGStmt.cpp
+++ b/clang/lib/CodeGen/CGStmt.cpp
@@ -1926,7 +1926,7 @@ void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
// Simplify the output constraint.
std::string OutputConstraint(S.getOutputConstraint(i));
OutputConstraint = SimplifyConstraint(OutputConstraint.c_str() + 1,
- getTarget());
+ getTarget(), &OutputConstraintInfos);
const Expr *OutExpr = S.getOutputExpr(i);
OutExpr = OutExpr->IgnoreParenNoopCasts(getContext());
diff --git a/clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl b/clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl
new file mode 100644
index 00000000000..ccd98210d3a
--- /dev/null
+++ b/clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl
@@ -0,0 +1,8 @@
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -emit-llvm -o - -triple amdgcn %s | FileCheck %s
+
+kernel void test_long(int arg0) {
+ long v15_16;
+ // CHECK: tail call i64 asm sideeffect "v_lshlrev_b64 v[15:16], 0, $0", "={v[15:16]},v"(i32 %arg0)
+ __asm volatile("v_lshlrev_b64 v[15:16], 0, %0" : "={v[15:16]}"(v15_16) : "v"(arg0));
+}
diff --git a/clang/test/Sema/inline-asm-validate-amdgpu.cl b/clang/test/Sema/inline-asm-validate-amdgpu.cl
index bc2580c5738..51009ecb3f1 100644
--- a/clang/test/Sema/inline-asm-validate-amdgpu.cl
+++ b/clang/test/Sema/inline-asm-validate-amdgpu.cl
@@ -74,3 +74,8 @@ test_double(const __global double *a, const __global double *b, __global double
c[i] = ci;
}
+
+void test_long(int arg0) {
+ long v15_16;
+ __asm volatile("v_lshlrev_b64 v[15:16], 0, %0" : "={v[15:16]}"(v15_16) : "v"(arg0));
+}
OpenPOWER on IntegriCloud