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| author | Bob Wilson <bob.wilson@apple.com> | 2009-08-22 02:28:46 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2009-08-22 02:28:46 +0000 |
| commit | abd97fe1b122cbf4cad9cf0f04d1c27770205ffb (patch) | |
| tree | 131c06e2b9e2bd193c5d7c8f8d2ca591b56b0ab0 | |
| parent | a16e4b73809b4715543d490d636de4141abc142b (diff) | |
| download | bcm5719-llvm-abd97fe1b122cbf4cad9cf0f04d1c27770205ffb.tar.gz bcm5719-llvm-abd97fe1b122cbf4cad9cf0f04d1c27770205ffb.zip | |
Add new intrinsics for Neon vldN_lane and vstN_lane operations.
llvm-svn: 79716
| -rw-r--r-- | llvm/include/llvm/IntrinsicsARM.td | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/include/llvm/IntrinsicsARM.td b/llvm/include/llvm/IntrinsicsARM.td index e9dbb490b47..c408a2f374e 100644 --- a/llvm/include/llvm/IntrinsicsARM.td +++ b/llvm/include/llvm/IntrinsicsARM.td @@ -326,6 +326,23 @@ let TargetPrefix = "arm" in { LLVMMatchType<0>, LLVMMatchType<0>], [llvm_ptr_ty], [IntrReadArgMem]>; + // Vector load N-element structure to one lane. + def int_arm_neon_vld2lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>], + [llvm_ptr_ty, LLVMMatchType<0>, + LLVMMatchType<0>, llvm_i32_ty], + [IntrReadArgMem]>; + def int_arm_neon_vld3lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, + LLVMMatchType<0>], + [llvm_ptr_ty, LLVMMatchType<0>, + LLVMMatchType<0>, LLVMMatchType<0>, + llvm_i32_ty], [IntrReadArgMem]>; + def int_arm_neon_vld4lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, + LLVMMatchType<0>, LLVMMatchType<0>], + [llvm_ptr_ty, LLVMMatchType<0>, + LLVMMatchType<0>, LLVMMatchType<0>, + LLVMMatchType<0>, llvm_i32_ty], + [IntrReadArgMem]>; + // Interleaving vector stores from N-element structures. def int_arm_neon_vst1 : Intrinsic<[llvm_void_ty], [llvm_ptr_ty, llvm_anyvector_ty], @@ -341,4 +358,19 @@ let TargetPrefix = "arm" in { [llvm_ptr_ty, llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrWriteArgMem]>; + + // Vector store N-element structure from one lane. + def int_arm_neon_vst2lane : Intrinsic<[llvm_void_ty], + [llvm_ptr_ty, llvm_anyvector_ty, + LLVMMatchType<0>, llvm_i32_ty], + [IntrWriteArgMem]>; + def int_arm_neon_vst3lane : Intrinsic<[llvm_void_ty], + [llvm_ptr_ty, llvm_anyvector_ty, + LLVMMatchType<0>, LLVMMatchType<0>, + llvm_i32_ty], [IntrWriteArgMem]>; + def int_arm_neon_vst4lane : Intrinsic<[llvm_void_ty], + [llvm_ptr_ty, llvm_anyvector_ty, + LLVMMatchType<0>, LLVMMatchType<0>, + LLVMMatchType<0>, llvm_i32_ty], + [IntrWriteArgMem]>; } |
