[X86] Rename the operands in the recently introduced MOVSS+FMA patterns so that the operand names in the output pattern are always in 1, 2, 3 order since those are the operand names in the instruction.

The order should be controlled in the input pattern.

llvm-svn: 333463

3 files changed, 40 insertions, 40 deletions

diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index 2b65106518c..0bc44ac4948 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -6699,40 +6699,40 @@ defm VFNMSUB : avx512_fma3s<0xAF, 0xBF, 0x9F, "vfnmsub", X86Fnmsub, X86Fnmsubs1,
 
 multiclass avx512_scalar_fma_patterns<SDNode Op, string Prefix, string Suffix, SDNode Move,
                                       ValueType VT, ValueType EltVT, PatLeaf ZeroFP> {
-  let Predicates = [HasFMA, HasAVX512] in {
-    def : Pat<(VT (Move (VT VR128:$src2), (VT (scalar_to_vector
-                (Op (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
-                    (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
+  let Predicates = [HasAVX512] in {
+    def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
+                (Op (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
+                    (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
                     (EltVT (extractelt (VT VR128:$src3), (iPTR 0)))))))),
               (!cast<I>(Prefix#"213"#Suffix#"Zr_Int")
-               VR128:$src2, VR128:$src1, VR128:$src3)>;
+               VR128:$src1, VR128:$src2, VR128:$src3)>;
 
-    def : Pat<(VT (Move (VT VR128:$src2), (VT (scalar_to_vector
+    def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
                (X86selects VK1WM:$mask,
-                (Op (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
-                    (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
+                (Op (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
+                    (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
                     (EltVT (extractelt (VT VR128:$src3), (iPTR 0)))),
-                (EltVT (extractelt (VT VR128:$src2), (iPTR 0)))))))),
+                (EltVT (extractelt (VT VR128:$src1), (iPTR 0)))))))),
               (!cast<I>(Prefix#"213"#Suffix#"Zr_Intk")
-               VR128:$src2, VK1WM:$mask, VR128:$src1, VR128:$src3)>;
+               VR128:$src1, VK1WM:$mask, VR128:$src2, VR128:$src3)>;
 
-    def : Pat<(VT (Move (VT VR128:$src3), (VT (scalar_to_vector
+    def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
                (X86selects VK1WM:$mask,
-                (Op (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
-                    (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
-                    (EltVT (extractelt (VT VR128:$src3), (iPTR 0)))),
-                (EltVT (extractelt (VT VR128:$src3), (iPTR 0)))))))),
+                (Op (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
+                    (EltVT (extractelt (VT VR128:$src3), (iPTR 0))),
+                    (EltVT (extractelt (VT VR128:$src1), (iPTR 0)))),
+                (EltVT (extractelt (VT VR128:$src1), (iPTR 0)))))))),
               (!cast<I>(Prefix#"231"#Suffix#"Zr_Intk")
-               VR128:$src3, VK1WM:$mask, VR128:$src2, VR128:$src1)>;
+               VR128:$src1, VK1WM:$mask, VR128:$src2, VR128:$src3)>;
 
-    def : Pat<(VT (Move (VT VR128:$src2), (VT (scalar_to_vector
+    def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
                (X86selects VK1WM:$mask,
-                (Op (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
-                    (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
+                (Op (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
+                    (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
                     (EltVT (extractelt (VT VR128:$src3), (iPTR 0)))),
                 (EltVT ZeroFP)))))),
               (!cast<I>(Prefix#"213"#Suffix#"Zr_Intkz")
-               VR128:$src2, VK1WM:$mask, VR128:$src1, VR128:$src3)>;
+               VR128:$src1, VK1WM:$mask, VR128:$src2, VR128:$src3)>;
   }
 }
 
diff --git a/llvm/lib/Target/X86/X86InstrFMA.td b/llvm/lib/Target/X86/X86InstrFMA.td
index c106b825f57..023644d1b6d 100644
--- a/llvm/lib/Target/X86/X86InstrFMA.td
+++ b/llvm/lib/Target/X86/X86InstrFMA.td
@@ -367,12 +367,12 @@ defm VFNMSUB : fma3s<0x9F, 0xAF, 0xBF, "vfnmsub", X86Fnmsubs1, X86Fnmsub,
 multiclass scalar_fma_patterns<SDNode Op, string Prefix, string Suffix, SDNode Move,
                                ValueType VT, ValueType EltVT> {
   let Predicates = [HasFMA, NoAVX512] in {
-    def : Pat<(VT (Move (VT VR128:$src2), (VT (scalar_to_vector
-                (Op (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
-                    (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
+    def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
+                (Op (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
+                    (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
                     (EltVT (extractelt (VT VR128:$src3), (iPTR 0)))))))),
               (!cast<I>(Prefix#"213"#Suffix#"r_Int")
-               VR128:$src2, VR128:$src1, VR128:$src3)>;
+               VR128:$src1, VR128:$src2, VR128:$src3)>;
   }
 }
 
diff --git a/llvm/test/CodeGen/X86/fma-scalar-combine.ll b/llvm/test/CodeGen/X86/fma-scalar-combine.ll
index 188408fb7ae..f8e823525b8 100644
--- a/llvm/test/CodeGen/X86/fma-scalar-combine.ll
+++ b/llvm/test/CodeGen/X86/fma-scalar-combine.ll
@@ -93,8 +93,8 @@ define <2 x double> @combine_scalar_mask3_fmadd_32(<2 x double> %a, <2 x double>
 ; CHECK-LABEL: combine_scalar_mask3_fmadd_32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
-; CHECK-NEXT:    vfmadd231ss %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf2,0x7d,0x09,0xb9,0xd1]
-; CHECK-NEXT:    # xmm2 = (xmm0 * xmm1) + xmm2
+; CHECK-NEXT:    vfmadd231ss %xmm0, %xmm1, %xmm2 {%k1} # encoding: [0x62,0xf2,0x75,0x09,0xb9,0xd0]
+; CHECK-NEXT:    # xmm2 = (xmm1 * xmm0) + xmm2
 ; CHECK-NEXT:    vmovaps %xmm2, %xmm0 # encoding: [0xc5,0xf8,0x28,0xc2]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -118,8 +118,8 @@ define <2 x double> @combine_scalar_mask3_fmadd_64(<2 x double> %a, <2 x double>
 ; CHECK-LABEL: combine_scalar_mask3_fmadd_64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
-; CHECK-NEXT:    vfmadd231sd %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf2,0xfd,0x09,0xb9,0xd1]
-; CHECK-NEXT:    # xmm2 = (xmm0 * xmm1) + xmm2
+; CHECK-NEXT:    vfmadd231sd %xmm0, %xmm1, %xmm2 {%k1} # encoding: [0x62,0xf2,0xf5,0x09,0xb9,0xd0]
+; CHECK-NEXT:    # xmm2 = (xmm1 * xmm0) + xmm2
 ; CHECK-NEXT:    vmovapd %xmm2, %xmm0 # encoding: [0xc5,0xf9,0x28,0xc2]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -227,8 +227,8 @@ define <2 x double> @combine_scalar_mask3_fmsub_32(<2 x double> %a, <2 x double>
 ; CHECK-LABEL: combine_scalar_mask3_fmsub_32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
-; CHECK-NEXT:    vfmsub231ss %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf2,0x7d,0x09,0xbb,0xd1]
-; CHECK-NEXT:    # xmm2 = (xmm0 * xmm1) - xmm2
+; CHECK-NEXT:    vfmsub231ss %xmm0, %xmm1, %xmm2 {%k1} # encoding: [0x62,0xf2,0x75,0x09,0xbb,0xd0]
+; CHECK-NEXT:    # xmm2 = (xmm1 * xmm0) - xmm2
 ; CHECK-NEXT:    vmovaps %xmm2, %xmm0 # encoding: [0xc5,0xf8,0x28,0xc2]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -252,8 +252,8 @@ define <2 x double> @combine_scalar_mask3_fmsub_64(<2 x double> %a, <2 x double>
 ; CHECK-LABEL: combine_scalar_mask3_fmsub_64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
-; CHECK-NEXT:    vfmsub231sd %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf2,0xfd,0x09,0xbb,0xd1]
-; CHECK-NEXT:    # xmm2 = (xmm0 * xmm1) - xmm2
+; CHECK-NEXT:    vfmsub231sd %xmm0, %xmm1, %xmm2 {%k1} # encoding: [0x62,0xf2,0xf5,0x09,0xbb,0xd0]
+; CHECK-NEXT:    # xmm2 = (xmm1 * xmm0) - xmm2
 ; CHECK-NEXT:    vmovapd %xmm2, %xmm0 # encoding: [0xc5,0xf9,0x28,0xc2]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -361,8 +361,8 @@ define <2 x double> @combine_scalar_mask3_fnmadd_32(<2 x double> %a, <2 x double
 ; CHECK-LABEL: combine_scalar_mask3_fnmadd_32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
-; CHECK-NEXT:    vfnmadd231ss %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf2,0x7d,0x09,0xbd,0xd1]
-; CHECK-NEXT:    # xmm2 = -(xmm0 * xmm1) + xmm2
+; CHECK-NEXT:    vfnmadd231ss %xmm0, %xmm1, %xmm2 {%k1} # encoding: [0x62,0xf2,0x75,0x09,0xbd,0xd0]
+; CHECK-NEXT:    # xmm2 = -(xmm1 * xmm0) + xmm2
 ; CHECK-NEXT:    vmovaps %xmm2, %xmm0 # encoding: [0xc5,0xf8,0x28,0xc2]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -386,8 +386,8 @@ define <2 x double> @combine_scalar_mask3_fnmadd_64(<2 x double> %a, <2 x double
 ; CHECK-LABEL: combine_scalar_mask3_fnmadd_64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
-; CHECK-NEXT:    vfnmadd231sd %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf2,0xfd,0x09,0xbd,0xd1]
-; CHECK-NEXT:    # xmm2 = -(xmm0 * xmm1) + xmm2
+; CHECK-NEXT:    vfnmadd231sd %xmm0, %xmm1, %xmm2 {%k1} # encoding: [0x62,0xf2,0xf5,0x09,0xbd,0xd0]
+; CHECK-NEXT:    # xmm2 = -(xmm1 * xmm0) + xmm2
 ; CHECK-NEXT:    vmovapd %xmm2, %xmm0 # encoding: [0xc5,0xf9,0x28,0xc2]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -499,8 +499,8 @@ define <2 x double> @combine_scalar_mask3_fnmsub_32(<2 x double> %a, <2 x double
 ; CHECK-LABEL: combine_scalar_mask3_fnmsub_32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
-; CHECK-NEXT:    vfnmsub231ss %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf2,0x7d,0x09,0xbf,0xd1]
-; CHECK-NEXT:    # xmm2 = -(xmm0 * xmm1) - xmm2
+; CHECK-NEXT:    vfnmsub231ss %xmm0, %xmm1, %xmm2 {%k1} # encoding: [0x62,0xf2,0x75,0x09,0xbf,0xd0]
+; CHECK-NEXT:    # xmm2 = -(xmm1 * xmm0) - xmm2
 ; CHECK-NEXT:    vmovaps %xmm2, %xmm0 # encoding: [0xc5,0xf8,0x28,0xc2]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -525,8 +525,8 @@ define <2 x double> @combine_scalar_mask3_fnmsub_64(<2 x double> %a, <2 x double
 ; CHECK-LABEL: combine_scalar_mask3_fnmsub_64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
-; CHECK-NEXT:    vfnmsub231sd %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf2,0xfd,0x09,0xbf,0xd1]
-; CHECK-NEXT:    # xmm2 = -(xmm0 * xmm1) - xmm2
+; CHECK-NEXT:    vfnmsub231sd %xmm0, %xmm1, %xmm2 {%k1} # encoding: [0x62,0xf2,0xf5,0x09,0xbf,0xd0]
+; CHECK-NEXT:    # xmm2 = -(xmm1 * xmm0) - xmm2
 ; CHECK-NEXT:    vmovapd %xmm2, %xmm0 # encoding: [0xc5,0xf9,0x28,0xc2]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry: