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authorWei Mi <wmi@google.com>2016-09-18 06:10:32 +0000
committerWei Mi <wmi@google.com>2016-09-18 06:10:32 +0000
commitab24cd189f79e657a4a9e2e9e9cd191a4659af00 (patch)
tree1fdbdf539f3648212468f0a6cafa04d0f2d89e54
parent8e781a888ae6d27b6ab1c06790fad8a88d5b72ae (diff)
downloadbcm5719-llvm-ab24cd189f79e657a4a9e2e9e9cd191a4659af00.tar.gz
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Change the order of the splitted store from high - low to low - high.
It is a trivial change which could make the testcase easier to be reused for the store splitting in CodeGenPrepare. llvm-svn: 281846
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp4
-rw-r--r--llvm/test/CodeGen/X86/split-store.ll8
2 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 316a04ad777..bd882871246 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -12330,10 +12330,10 @@ SDValue DAGCombiner::splitMergedValStore(StoreSDNode *ST) {
DAG.getConstant(HalfValBitSize / 8, DL, Ptr.getValueType()));
// Higher value store.
SDValue St1 =
- DAG.getStore(Chain, DL, Hi, Ptr,
+ DAG.getStore(St0, DL, Hi, Ptr,
ST->getPointerInfo().getWithOffset(HalfValBitSize / 8),
Alignment / 2, MMOFlags, AAInfo);
- return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, St0, St1);
+ return St1;
}
SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) {
diff --git a/llvm/test/CodeGen/X86/split-store.ll b/llvm/test/CodeGen/X86/split-store.ll
index 7a491e6233d..8a276f8d2f7 100644
--- a/llvm/test/CodeGen/X86/split-store.ll
+++ b/llvm/test/CodeGen/X86/split-store.ll
@@ -1,8 +1,8 @@
; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
; CHECK-LABEL: int32_float_pair
-; CHECK: movss %xmm0, 4(%rsi)
; CHECK: movl %edi, (%rsi)
+; CHECK: movss %xmm0, 4(%rsi)
define void @int32_float_pair(i32 %tmp1, float %tmp2, i64* %ref.tmp) {
entry:
%t0 = bitcast float %tmp2 to i32
@@ -15,8 +15,8 @@ entry:
}
; CHECK-LABEL: float_int32_pair
-; CHECK: movl %edi, 4(%rsi)
; CHECK: movss %xmm0, (%rsi)
+; CHECK: movl %edi, 4(%rsi)
define void @float_int32_pair(float %tmp1, i32 %tmp2, i64* %ref.tmp) {
entry:
%t0 = bitcast float %tmp1 to i32
@@ -29,9 +29,9 @@ entry:
}
; CHECK-LABEL: int16_float_pair
-; CHECK: movss %xmm0, 4(%rsi)
; CHECK: movzwl %di, %eax
; CHECK: movl %eax, (%rsi)
+; CHECK: movss %xmm0, 4(%rsi)
define void @int16_float_pair(i16 signext %tmp1, float %tmp2, i64* %ref.tmp) {
entry:
%t0 = bitcast float %tmp2 to i32
@@ -44,9 +44,9 @@ entry:
}
; CHECK-LABEL: int8_float_pair
-; CHECK: movss %xmm0, 4(%rsi)
; CHECK: movzbl %dil, %eax
; CHECK: movl %eax, (%rsi)
+; CHECK: movss %xmm0, 4(%rsi)
define void @int8_float_pair(i8 signext %tmp1, float %tmp2, i64* %ref.tmp) {
entry:
%t0 = bitcast float %tmp2 to i32
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