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| author | Evan Cheng <evan.cheng@apple.com> | 2008-04-09 01:30:15 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-04-09 01:30:15 +0000 |
| commit | aa3b55f842b85933122166a4213487e377fbf7c5 (patch) | |
| tree | b69736ca47eb67a53b99c410707ae75216560038 | |
| parent | ce8e881dc3a2f245d5541a36e1647e135c21b6e3 (diff) | |
| download | bcm5719-llvm-aa3b55f842b85933122166a4213487e377fbf7c5.tar.gz bcm5719-llvm-aa3b55f842b85933122166a4213487e377fbf7c5.zip | |
Missed a hasInterval check.
llvm-svn: 49415
| -rw-r--r-- | llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll | 19 |
2 files changed, 21 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp index 3f124c00406..acbc911d6ac 100644 --- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1655,6 +1655,8 @@ SimpleRegisterCoalescing::TurnCopyIntoImpDef(MachineBasicBlock::iterator &I, LiveInterval &SrcInt = li_->getInterval(SrcReg); if (!SrcInt.empty()) return false; + if (!li_->hasInterval(DstReg)) + return false; LiveInterval &DstInt = li_->getInterval(DstReg); LiveInterval::iterator DstLR = DstInt.FindLiveRangeContaining(CopyIdx); DstInt.removeValNo(DstLR->valno); diff --git a/llvm/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll new file mode 100644 index 00000000000..f5de113b9ea --- /dev/null +++ b/llvm/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx + +define i32 @t2() nounwind { +entry: + tail call void asm sideeffect "# top of block", "~{dirflag},~{fpsr},~{flags},~{di},~{si},~{dx},~{cx},~{ax}"( ) nounwind + tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind + tail call void asm sideeffect ".line 8", "~{dirflag},~{fpsr},~{flags}"( ) nounwind + %tmp1 = tail call <2 x i32> asm sideeffect "movd $1, $0", "=={mm4},{bp},~{dirflag},~{fpsr},~{flags},~{memory}"( i32 undef ) nounwind ; <<2 x i32>> [#uses=1] + tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind + tail call void asm sideeffect ".line 9", "~{dirflag},~{fpsr},~{flags}"( ) nounwind + %tmp3 = tail call i32 asm sideeffect "movd $1, $0", "=={bp},{mm3},~{dirflag},~{fpsr},~{flags},~{memory}"( <2 x i32> undef ) nounwind ; <i32> [#uses=1] + tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind + tail call void asm sideeffect ".line 10", "~{dirflag},~{fpsr},~{flags}"( ) nounwind + tail call void asm sideeffect "movntq $0, 0($1,$2)", "{mm0},{di},{bp},~{dirflag},~{fpsr},~{flags},~{memory}"( <2 x i32> undef, i32 undef, i32 %tmp3 ) nounwind + tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind + tail call void asm sideeffect ".line 11", "~{dirflag},~{fpsr},~{flags}"( ) nounwind + %tmp8 = tail call i32 asm sideeffect "movd $1, $0", "=={bp},{mm4},~{dirflag},~{fpsr},~{flags},~{memory}"( <2 x i32> %tmp1 ) nounwind ; <i32> [#uses=0] + ret i32 undef +} |
