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author | Chris Lattner <sabre@nondot.org> | 2005-09-02 18:33:05 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-09-02 18:33:05 +0000 |
commit | aa3b1fcc58cdac20c833abced4cd0de8258f1351 (patch) | |
tree | 2bd427d0bf57cd9c8c39afe804a676cc8b6544c1 | |
parent | ffb99034cf147b8deceb6eaea17b125fb89d1d1c (diff) | |
download | bcm5719-llvm-aa3b1fcc58cdac20c833abced4cd0de8258f1351.tar.gz bcm5719-llvm-aa3b1fcc58cdac20c833abced4cd0de8258f1351.zip |
Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.
Remove the -enable-gpopt option which is subsumed by feature flags.
llvm-svn: 23218
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 11 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCSubtarget.h | 3 |
3 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 8490adb3c33..d01dc05a851 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -54,7 +54,7 @@ PPC32TargetLowering::PPC32TargetLowering(TargetMachine &TM) setOperationAction(ISD::SREM , MVT::f32, Expand); // If we're enabling GP optimizations, use hardware square root - if (!TM.getSubtarget<PPCSubtarget>().isGigaProcessor()) { + if (!TM.getSubtarget<PPCSubtarget>().hasFSQRT()) { setOperationAction(ISD::FSQRT, MVT::f64, Expand); setOperationAction(ISD::FSQRT, MVT::f32, Expand); } diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp index 2c1b7839a5f..0efc1c152d8 100644 --- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp @@ -25,11 +25,10 @@ namespace llvm { PPCTargetArg(cl::desc("Force generation of code for a specific PPC target:"), cl::values( clEnumValN(TargetAIX, "aix", " Enable AIX codegen"), - clEnumValN(TargetDarwin,"darwin"," Enable Darwin codegen"), + clEnumValN(TargetDarwin,"darwin", + " Enable Darwin codegen"), clEnumValEnd), cl::location(PPCTarget), cl::init(TargetDefault)); - cl::opt<bool> EnableGPOPT("enable-gpopt", cl::Hidden, - cl::desc("Enable optimizations for GP cpus")); } enum PowerPCFeature { @@ -126,7 +125,8 @@ PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS) SubtargetFeatures::Parse(FS, CPU, PowerPCSubTypeKV, PowerPCSubTypeKVSize, PowerPCFeatureKV, PowerPCFeatureKVSize); - IsGigaProcessor = (Bits & PowerPCFeatureGPUL) != 0; + IsGigaProcessor = (Bits & PowerPCFeatureGPUL ) != 0; + HasFSQRT = (Bits & PowerPCFeatureFSqrt) != 0; // Set the boolean corresponding to the current target triple, or the default // if one cannot be determined, to true. @@ -140,7 +140,4 @@ PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS) IsDarwin = true; #endif } - - // If GP opts are forced on by the commandline, do so now. - if (EnableGPOPT) IsGigaProcessor = true; } diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h index aaf07f91299..33f73b22aaf 100644 --- a/llvm/lib/Target/PowerPC/PPCSubtarget.h +++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h @@ -29,6 +29,7 @@ protected: /// Used by the ISel to turn in optimizations for POWER4-derived architectures bool IsGigaProcessor; + bool HasFSQRT; bool IsAIX; bool IsDarwin; public: @@ -42,6 +43,8 @@ public: /// function for this subtarget. unsigned getStackAlignment() const { return StackAlignment; } + bool hasFSQRT() const { return HasFSQRT; } + bool isAIX() const { return IsAIX; } bool isDarwin() const { return IsDarwin; } |